142 research outputs found

    Lyapunov Stability of an Open-Loop Induction Machine

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    The induction machine is widely utilized in the industry and exists in a plethora of applications. Although it is characterized by its inherent stability over a wide range of operating conditions, this characterization is based on steadystate arguments. This work develops a rigorous approach to the open-loop stability of the induction machine. In particular, a condition for the global asymptotic stability of the induction machine in the sense of Lyapunov is presented. These conditions are met if the machine is lightly loaded. Hence, meeting these conditions guarantees that the motor will reach (or return to) the desired equilibrium point regardless of how far it has been perturbed from it. The analysis is based on the standard nonlinear differential equation model of the induction machine taking into account transient responses

    A Study of the Lyapunov Stability of an Open-Loop Induction Machine

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    The induction motor is widely utilized in industry and exists in a plethora of applications. Until the last 20 years or so, it was primarily used in an open-loop fashion (i.e., balanced sinusoidal voltages, constant load torque and viscous friction) with its inherent stability counted on to allow operation over a wide range of operating conditions. Unlike classical arguments based on the steady-state torque-slip curve, a rigorous analytical stability argument using the full nonlinear dynamical model is presented. In particular, conditions for global asymptotic stability of the induction motor in the sense of Lyapunov are given in terms of the motor parameters, operating slip, and synchronous frequency

    Robust stability of time delay systems: Theory

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    Given that a time-delay system is stable for some delay h0 \u3e 0, a procedure is given to find the stability interval [h1 ; h2 ] such that h0 2 [h1 ; h2] and for all h satisfying h1 \u3c h \u3c h2 the system is stable. Further, the system is shown to be unstable if h = h1 or h = h2. It is then shown how this can be applied to test the robust stability (with respect to delay values) of a Smith-Predictor based controller

    A Deep Unsupervised Feature Learning Spiking Neural Network with Binarized Classification Layers for the EMNIST Classification

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    End user AI is trained on large server farms with data collected from the users. With ever increasing demand for IoT devices, there is a need for deep learning approaches that can be implemented at the Edge in an energy efficient manner. In this work we approach this using spiking neural networks. The unsupervised learning technique of spike timing dependent plasticity (STDP) and binary activations are used to extract features from spiking input data. Gradient descent (backpropagation) is used only on the output layer to perform training for classification. The accuracies obtained for the balanced EMNIST data set compare favorably with other approaches. The effect of the stochastic gradient descent (SGD) approximations on learning capabilities of our network are also explored

    Deep Spiking Neural Networks: Study on the MNIST and N-MNIST Data Sets

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    Deep learning, i.e., the use of deep convolutional neural networks (DCNN), is a powerful tool for pattern recognition (image classification) and natural language (speech) processing. Deep convolutional networks use multiple convoltuion layers to learn the input data. They have been used to classify the large dataset Imagenet with an accuracy of 96.6%. In this work deep spiking networks are considered. This is new paradigm for implementing artificial neural networks using mechanisms that incorporate spike-timing dependent plasticity which is a learning algorithm discovered by neuroscientists. Advances in deep learning has opened up multitude of new avenues that once were limited to science fiction. The promise of spiking networks is that they are less computationally intensive and much more energy efficient as the spiking algorithms can be implemented on a neuromorphic chip such as Intel’s LOIHI chip (operates at low power because it runs asynchronously using spikes). Our work is based on the work of Masquelier and Thorpe, and Kheradpisheh et al. In particular a study is done of how such networks classify MNIST image data and N-MNIST spiking data. The networks used in consist of multiple convolution/pooling layers of spiking neurons trained using spike timing dependent plasticity (STDP) and a final classification layer done using a support vector machine (SVM)

    Conditions for Capacitor Voltage Regulation in a Five-Level Cascade Multilevel Inverter: Application to Voltage-Boost in a PM Drive

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    A cascade multilevel inverter is a power electronic device built to synthesize a desired AC voltage from several levels of DC voltages. Such inverters have been the subject of research in the last several years, where the DC levels were considered to be identical in that all of them were either batteries, solar cells, etc. Similar to previous results in the literature, the work here shows how a cascade multilevel inverter can be used to obtain a voltage boost at higher speeds for a three-phase PM drive using only a single DC voltage source. The input of a standard three-leg inverter is connected to the DC source and the output of each leg is fed through an H-bridge (which is supplied by a capacitor) to form a cascade multilevel inverter. A fundamental switching scheme is used, which achieves the fundamental in the output voltage while eliminating the fifth harmonic. A new contribution in this paper is the development of explicit conditions in terms of the power factor and modulation index for which the capacitor voltage of the H-bridges can be regulated while simultaneously maintaining the aforementioned output voltage. This is then used for a PM motor drive showing the machine can attain higher speeds due to the higher output voltage of the multilevel inverter compared to using just a three-leg inverter

    High Dynamic Performance Programmed PWM Control of a Multilevel Inverter with Capacitor DC Sources

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    A cascade multilevel inverter consisting of a standard 3-leg inverter supplied by a DC source and three full H-bridges each supplied by a capacitor is considered for use as a motor drive. The capacitor H-bridges can only supply reactive voltage to the motor while the standard three leg inverter can supply both reactive and active voltage. A switching control algorithm is presented that shows this inverter topology can be used as an AC drive achieving considerable performance advantages (e.g., higher motor speed) compared to using a standard 3-leg inverter while at the same time regulating the capacitor voltages. The converter controller is a fundamental frequency switching controller based on programmed PWM to achieve higher efficiency (less power losses in the switches) compared to high-frequency PWM approaches. As is well known, the programmed PWM switching times are computed assuming the drive is in sinusoidal steady-state, that is, the derived switching angles achieve the fundamental while rejecting specified harmonics if the voltage waveforms are in sinusoidal steady-state. Here it shown that the switching commands to the converter can be implemented in a smooth fashion for voltage waveform commands whose frequency and amplitudes are continuously varying

    Reduced Switching-Frequency Active Harmonic Elimination for Multilevel Converters

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    This paper presents a reduced switching-frequency active-harmonic-elimination method (RAHEM) to eliminate any number of specific order harmonics of multilevel converters. First, resultant theory is applied to transcendental equations to eliminate low-order harmonics and to determine switching angles for a fundamental frequency-switching scheme. Next, based on the number of harmonics to be eliminated, Newton climbing method is applied to transcendental equations to eliminate high-order harmonics and to determine switching angles for the fundamental frequency-switching scheme. Third, the magnitudes and phases of the residual lower order harmonics are computed, generated, and subtracted from the original voltage waveform to eliminate these low-order harmonics. Compared to the active-harmonic-elimination method (AHEM), which generates square waves to cancel high-order harmonics, RAHEM has lower switching frequency. The simulation results show that the method can effectively eliminate all the specific harmonics, and a low total harmonic distortion (THD) near sine wave is produced. An experimental 11-level H-bridge multilevel converter with a field-programmable gate-array controller is employed to experimentally validate the method. The experimental results show that RAHEM does effectively eliminate any number of specific harmonics, and the output voltage waveform has low switching frequency and low THD

    DC-AC Cascaded H-Bridge Multilevel Boost Inverter with No Inductors for Electric/Hybrid Electric Vehicle Applications

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    This paper presents a cascaded H-bridge multilevel boost inverter for electric vehicle (EV) and hybrid EV (HEV) applications implemented without the use of inductors. Currently available power inverter systems for HEVs use a dc–dc boost converter to boost the battery voltage for a traditional three-phase inverter. The present HEV traction drive inverters have low power density, are expensive, and have low efficiency because they need a bulky inductor. A cascaded H-bridge multilevel boost inverter design for EV and HEV applications implemented without the use of inductors is proposed in this paper. Traditionally, each H-bridge needs a dc power supply. The proposed design uses a standard three-leg inverter (one leg for each phase) and an H-bridge in series with each inverter leg which uses a capacitor as the dc power source. A fundamental switching scheme is used to do modulation control and to produce a five-level phase voltage. Experiments show that the proposed dc–ac cascaded H-bridge multilevel boost inverter can output a boosted ac voltage without the use of inductors
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