Optimization of the Phase Change Random Access Memory Employing Phase Change Materials

Phase-change random access memory (PCRAM) is a semiconductor device based on phase change material (PCM). The SET speed is the bottleneck of limiting the speed of PCRAM. Extract the electrical parameters of the SET operation of the PCRAM test chip and analyze the process of the SET operations. It is found that adding a high and narrow pulse before a single pulse (SP) benefits the SET resistance reduction and the SET speed improvement. A dual pulses SET (D-SET) method is proposed and optimized. The mechanism of D-SET is that the first pulse forms a large optimum temperature field cover over all regions of the PCM material. When the first pulse is converted to the second pulse, the optimum temperature field shrinks and causes the amorphous regions to rapidly crystallize from the edge to the center. On the 40 nm PCRAM test chip, the SET time of D-SET method is under 300 ns. Compared with the conventional SET method such as SP and staircase down pulses (SCD), the D-SET method is optimal for SET performance such as SET resistance distribution, SET speed, and the anti-drift ability

A Phase Change Memory Chip Based on TiSbTe Alloy in 40-nm Standard CMOS Technology

In this letter, a phase change random access memory (PCRAM) chip based on Ti0.4Sb2Te3 alloy material was fabricated in a 40-nm 4-metal level complementary metal-oxide semiconductor (CMOS) technology. The phase change resistor was then integrated after CMOS logic fabrication. The PCRAM was successfully embedded without changing any logic device and process, in which 1.1 V negative-channel metal-oxide semiconductor device was used as the memory cell selector. The currents and the time of SET and RESET operations were found to be 0.2 and 0.5 mA, 100 and 10 ns, respectively. The high speed performance of this chip may highlight the design advantages in many embedded applications

Correction: 12-state multi-level cell storage implemented in a 128 Mb phase change memory chip.

Correction for '12-state multi-level cell storage implemented in a 128 Mb phase change memory chip' by Zhitang Song et al., Nanoscale, 2021, DOI: 10.1039/d1nr00100k

Low Thermal Conductivity Phase Change Memory Superlattices

Phase change memory devices are typically reset by melt-quenching a material to radically lower its electrical conductance. The high power and concomitantly high current density required to reset phase change materials is the major issue that limits the access times of 3D phase change memory architectures. Phase change superlattices were developed to lower the reset energy by confining the phase transition to the interface between two different phase change materials. However, the high thermal conductivity of the superlattices means that heat is poorly confined within the phase change material, and most of the thermal energy is wasted to the surrounding materials. Here, we identified Ti as a useful dopant for substantially lowering the thermal conductivity of Sb2Te3-GeTe superlattices whilst also stabilising the layered structure from unwanted disordering. We demonstrate via laser heating that lowering the thermal conductivity by doping the Sb2Te3 layers with Ti halves the switching energy compared to superlattices that only use interfacial phase change transitions and strain engineering. The thermally optimized superlattice has (0 0 l) crystallographic orientation yet a thermal conductivity of just 0.25 W/m.K in the "on" (set) state. Prototype phase change memory devices that incorporate this Ti-doped superlattice switch faster and and at a substantially lower voltage than the undoped superlattice. During switching the Ti-doped Sb2Te3 layers remain stable within the superlattice and only the Ge atoms are active and undergo interfacial phase transitions. In conclusion, we show the potential of thermally optimised Sb2Te3-GeTe superlattices for a new generation of energy-efficient electrical and optical phase change memory.Comment: 4 Figures, 7 Supplementary Figures, 27 pages including a supplemen

Structural and abnormal electrical properties of excess PbO-doped lead lanthanum titanate thin films

Lead lanthanum titanate (PLT) thin films with excess PbO (from 0 to 20 mol%) were prepared by a metal-organic decomposition process. The ferroelectric properties and current-voltage (C -V ) characteristics of PLT films were investigated as a function of the excess PbO. Abnormal ferroelectric and C -V properties were observed in PLT films with excess PbO. The polarization against applied electric field (P -E ) hysteresis loops were pinched before saturation of polarization of the films, and C -V curves had four peaks instead of the two peaks found in the normal C -V curves. The abnormal level of the hysteresis loops and C -V curves deteriorate with increasing concentrations of excess PbO in the films. Electron probe microanalysis has revealed that there is excess Pb in PLT thin films. Auger electron spectroscopy has detected that the Pb accumulates at the interfaces between the thin film and the bottom electrode. Meanwhile, transmission electron microscopy has found that PbO nanocrystals on the interface between the PLT thin film and the bottom electrode, and clusters of vacancies and interstitials, in particular, exist in the PLT grains. Therefore, a part of the excess PbO may accumulate at the domain wall of the grains and the grain boundaries and the interface between the bottom electrode and film during the thermal annealing process of the films. Meanwhile, the oxygen vacancies of the grains will increase with the increasing concentration of the excess PbO in the films. The excess PbO and oxygen vacancies act as pinning centres and have a strong pinning effect on the domains. When the poling voltage is not large enough, part of the domains can overcome the force of the pinning, and abnormal ferroelectric and C -V properties were observed.Peer Reviewedhttp://deepblue.lib.umich.edu/bitstream/2027.42/48906/2/d00703.pd

Minimizing the programming power of phase change memory by using graphene nanoribbon edge-contact

Nonvolatile phase change random access memory (PCRAM) is regarded as one of promising candidates for emerging mass storage in the era of Big Data. However, relatively high programming energy hurdles the further reduction of power consumption in PCRAM. Utilizing narrow edge-contact of graphene can effectively reduce the active volume of phase change material in each cell, and therefore realize low-power operation. Here, we demonstrate that a write energy can be reduced to about ~53.7 fJ in a cell with ~3 nm-wide graphene nanoribbon (GNR) as edge-contact, whose cross-sectional area is only ~1 nm2. It is found that the cycle endurance exhibits an obvious dependence on the bias polarity in the cell with structure asymmetry. If a positive bias was applied to graphene electrode, the endurance can be extended at least one order longer than the case with reversal of polarity. The work represents a great technological advance for the low power PCRAM and could benefit for in-memory computing in future.Comment: 14 pages, 4 figure

A 130nm 1Mb Embedded Phase Change Memory with 500kb/s Single Channel Write Throughput

Abstract A 130 nm 1Mb embedded phase change memory (PCM) has been achieved, requiring only three additional masks for phase change storage element, featuring 500 kb/s single channel write throughput and > 10 8 endurance. The prepare process has been optimized to reduce the cost and power. An 80 nm heat electrode has been prepared with 130 nm process. The optimal Read/Write circuit module is designed to realize the load/store function for PCM. The critical operation parameter is Reset/70 ns/2.5 mA and Set/1500 ns/1 mA, which means that the signal channel write throughput arrives to 500 kb/s

RESET Current Reduction for Phase Change Memory Based on Standard 0.13-μm CMOS Technology

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Phase stability and electronic structure of Si2Sb2Te5 phase-change material

Conference Name:5th International Conference on Study of Matter at Extreme Conditions. Conference Address: Miami, FL. Time:MAR 28-APR 02, 2009.On the basis of an ab initio computational study, the present work provide a full understanding on the atomic arrangements, phase stability as well as electronic structure of Si2Sb2Te5, a newly synthesized phase-change material. The results show that Si2Sb2Te5 tends to decompose into Si1Sb2Te4 or Si1Sb4Te7 or Sb2Te3, therefore, a nano-composite containing Si1Sb2Te4, Si1Sb4Te7 and Sb2Te3 may be self-generated from Si2Sb2Te5. Hence Si2Sb2Te5 based nano-composite is the real structure when Si2Sb2Te5 is used in electronic memory applications. The present results agree well with the recent experimental work. (C) 2010 Elsevier Ltd. All rights reserved