Criminal Sentencing in the CRPD Era: Lessons from Singapore

On 27 April 2022, Singapore executed Nagaenthran K. Dharmalingam, a 33-year-old Malaysian who was convicted of trafficking 42.72 grams of heroin. His execution was carried out despite calls from United Nations (UN) human rights experts, including the Special Rapporteur on the Rights of Persons with Disabilities, for the government to commute his death sentence inter alia on the basis that Nagaenthran did not have access to procedural accommodations for his disability during his interrogation and death sentences should not be carried out on persons with serious psychosocial and intellectual disabilities. Nagaenthran’s execution has put Singapore’s criminal legal system, particularly in respect of its treatment of offenders with intellectual and psychosocial disabilities, under international scrutiny

Assessing Behavioral Health Risks, Health Conditions, and Preventive Health Practices among American Indians/Alaska Natives in Nevada

The 2004 Behavioral Risk Factor Surveillance System (BRFSS) survey was administered to American Indian/Alaska Native (AI/AN) adults in Nevada to determine whether health disparities exist between AI/ANs and the state’s general population. Results showed AI/ANs were 1.5 times more likely to smoke cigarettes, 3.5 times more likely to be exposed to secondhand smoke, 3.2 times more likely to lack leisure-time physical activity, 9.7 times more likely to report fair/poor health status, and 7.7 times more likely to have a disability. In addition, AI/ANs were more likely to have current asthma (OR=5.0) and diabetes (OR=1.8). AI/AN women were 4.8 times as likely to report no Pap test in the past 3 years. Our findings suggest that Nevada’s AI/AN population face many health disparities related to risk behaviors, poor health status and health conditions, and healthcare access. Partnerships among tribal, state and federal public health systems are needed to address these disparities

Collections Earning Their Keep. An Overview of International Archiving Initiatives

DOI: 10.12685/027.7-3-1-58The 2014 IFLA Satellite Conference was held in Paris on August 13 and 14 jointly by the Library Buildings and Equipment section and the Acquisitions and Collection Development section. The following article attempts to give an overview of selected projects regarding storage and archiving of print collections focussing on background, goals, financing and challenges. The international contributors were also invited to give their thoughts about future collaborations.Im Anschluss an die von den IFLA-Sektionen Library Buildings and Equipment und Acquisitions and Collection Development gemeinsam organisierte Satellite Conference in Paris (13. und 14. August 2014) liefert dieser Beitrag einen Abriss über ausgewählte bibliothekarische Archivierungsinitiativen. Besondere Berücksichtigung finden dabei Hintergrund, Ziele und Finanzierung der Projekte sowie Herausforderungen, mit denen sich die jeweiligen Verantwortlichen konfrontiert sehen. Ein besonderes Anliegen war, Ideen zur künftigen internationalen Zusammenarbeit zu sammeln.Faisant suite à la conférence satellite de l’IFLA organisée conjointement à Paris le 13 et le 14 août 2014 par la section Library Buildings and Equipment et la section Acquisitions and Collection Development, cet article tente de donner un aperçu de quelques projets choisis, réalisés dans le domaine de l’entreposage et de l’archivage des collections imprimées. L’accent sera mis sur le contexte, les buts visés, le financement et les défis relevés. Les intervenants internationaux ont également été invités à faire part de leurs idées concernant des collaborations futures

Shape-controlled single-crystal growth of InP at low temperatures down to 220 °C.

III-V compound semiconductors are widely used for electronic and optoelectronic applications. However, interfacing III-Vs with other materials has been fundamentally limited by the high growth temperatures and lattice-match requirements of traditional deposition processes. Recently, we developed the templated liquid-phase (TLP) crystal growth method for enabling direct growth of shape-controlled single-crystal III-Vs on amorphous substrates. Although in theory, the lowest temperature for TLP growth is that of the melting point of the group III metal (e.g., 156.6 °C for indium), previous experiments required a minimum growth temperature of 500 °C, thus being incompatible with many application-specific substrates. Here, we demonstrate low-temperature TLP (LT-TLP) growth of single-crystalline InP patterns at substrate temperatures down to 220 °C by first activating the precursor, thus enabling the direct growth of InP even on low thermal budget substrates such as plastics and indium-tin-oxide (ITO)-coated glass. Importantly, the material exhibits high electron mobilities and good optoelectronic properties as demonstrated by the fabrication of high-performance transistors and light-emitting devices. Furthermore, this work may enable integration of III-Vs with silicon complementary metal-oxide-semiconductor (CMOS) processing for monolithic 3D integrated circuits and/or back-end electronics

Application of TVS Models for SEED Simulation of a Variety of TVS Devices

Accurate Models of Transient Voltage Suppression (TVS) Devices Are Important for Determining the Suitability of Electrostatic Discharge (ESD) Protection Strategies Early in the Design Process. an Improved TVS Model is Used in the Following Paper to Represent a Variety of TVS Devices, Including a Snapback Device, Non-Snapback Device, and a Varistor. the Models Include Recent Improvements to Represent Conductivity Modulation and the overall Shape of the TVS Device\u27s Transient Response. the Models Are Tuned based on Characterizations of These Protection Devices using a Transmission Line Pulse (TLP) and Are Then Used in a System Efficient ESD Design (SEED) Simulation to Predict the Transient Voltages and Currents in a System Consisting of an Off-Chip TVS, an IC with On-Chip ESD Protection, and a PCB Trace in Between. Simulated Transient Voltage and Current Waveforms Closely Match Measurements Both When Testing the TVS Devices by Themselves and in SEED Simulations. Peak and Quasistatic Currents through the TVS and On-Chip Diode Were Typically Captured within About 10% or Less Across the Devices Tested While Varying Both the Rise Time and Level of the Injected TLP

Modeling an ESD Gun Discharge to a USB Cable

When an electrostatic discharge (ESD) gun discharges to a USB cable, the routing and quality of the cable impacts the waveform seen at the printed circuit board (PCB) connected to the cable and the ability of an on-board transient voltage suppressor (TVS) to protect sensitive electronics. The impact of cable configurations during ESD gun contact discharge tests was investigated for multiple cable configurations. Injection to a cable pin whose shield is \u27floating\u27 at the injection site can cause a double-peak in the ESD waveform at the PCB and a lower maximum stress level than when the cable shield is connected to the return plane. Poor shielding of the USB connector can further induce a pre-pulse effect, where a smaller ESD pulse arrives at the PCB before the main pulse. This pre-pulse can result in poor firing of the TVS device and thus worsen ESD stress at a sensitive IC. Circuit models were developed to anticipate and explain both of these phenomena. These models were incorporated into a system-level transient simulation including models of a PCB with a TVS and a pair of on-chip diodes. This system-level model was able to predict the quasi-static and peak voltages and currents at the on-chip diode during 1-8 kV ESD contact-discharge tests with various USB cable configurations to within less than 30%. These models were used to develop test and design guidelines to account for the impact of the quality and configuration of a USB cable during an ESD discharge

Monolithic CMOS-compatible zero-index metamaterials

Zero-index materials exhibit exotic optical properties that can be utilized for integrated-optics applications. However, practical implementation requires compatibility with complementary metallic-oxide-semiconductor (CMOS) technologies. We demonstrate a CMOS-compatible zero-index metamaterial consisting of a square array of air holes in a 220-nm-thick silicon-on-insulator (SOI) wafer. This design is achieved through a Dirac-cone dispersion. The metamaterial is entirely composed of silicon and offers compatibility through low-aspect-ratio structures that can be simply fabricated in a standard device layer. This platform enables mass adoption and exploration of zero-index-based photonic devices at low cost and high fidelity.Comment: 18 pages, 4 figure

Improving Incremental Balance in the GSI 3DVAR Analysis System

The Gridpoint Statistical Interpolation (GSI) analysis system is a unified global/regional 3DVAR analysis code that has been under development for several years at the National Centers for Environmental Prediction (NCEP)/Environmental Modeling Center. It has recently been implemented into operations at NCEP in both the global and North American data assimilation systems (GDAS and NDAS). An important aspect of this development has been improving the balance of the analysis produced by GSI. The improved balance between variables has been achieved through the inclusion of a Tangent Linear Normal Mode Constraint (TLNMC). The TLNMC method has proven to be very robust and effective. The TLNMC as part of the global GSI system has resulted in substantial improvement in data assimilation both at NCEP and at the NASA Global Modeling and Assimilation Office (GMAO)

A Physics-Based Model For Snapback-Type ESD Protection Devices

A simplified physical-based model for deep-snapback transient voltage suppressors (TVS) is developed in this article. While based on physics, the number of parameters and components is minimized, so the model can be tuned easily from available measurements of the packaged TVS. SPICE convergence issues seen in previous snapback device models are eliminated by adding nonlinear damping components to the model. No convergence issues were seen among any of the simulations performed for this study, which includes transmission-line pulse tests with multiple levels and rise times. The proposed model was used to represent two different TVS devices and was validated in both device- and system-level simulations. Simulations of quasi-static and transient behavior matched measurement results within about 20% among all the tested cases