SRAM stability metric under transient noise

ventional way to analyze the robustness of an SRAM bit cell is to quantify its immunity to static noise. The static immunity to disturbances like process and mi smatch variations, bulk noises, supply rings variations, temperature changes is well characterized by means of the Static Noise Margin (SNM) defined as the maximum applicable series voltage at the inputs which causes no change in the data retention nodes. However, a significant number of disturbance sources present a transient behavior which is ignored by the static analysis but has to be taken in consideration for a complete characterization of the cell’s behavior. In this paper, a metric to evaluate the cell robustness in the presence of transient voltage noise is proposed based on determining the energy of the noise signal which is able to flip the cell’s state. The Dynamic Noise Margin(DNM) metric is defined as the minimum energy of the voltage noise signal able to flip the cell.Postprint (published version

Process variability in sub-16nm bulk CMOS technology

The document is part of deliverable D3.6 of the TRAMS Project (EU FP7 248789), of public nature, and shows and justifies the levels of variability used in the research project for sub-18nm bulk CMOS technologies.Postprint (published version

Randomness in emerging technologies: Functional robustness vs. security

International audienceThe rapid development of low power, high density, high performance SoCs has pushed the CMOS devices to their limits and opened the field to the development of emerging technologies. The STT-MRAM and RRAM have emerged as promising choices for embedded memories due to their reduced read/write latency and high CMOS integration capability. Their inner properties make them ideal for implementation of memory blocks (mach and main memory) and, in addition, they are suitable for the implementation of basic security primitives such Physically Unclonable Functions (PUFs) and True Random Number Generators (TRNGs). PUFs are emerging primitives used to implement low-cost device authentication and secure secret key generation. On the other hand, TRNGs generate random numbers from a physical process. This talk will present a survey of today’s and tomorrow’s technologies and explain how it is possible to exploit (i) the high variability affecting the electrical device characteristics to build a robust, unclonable and unpredictable PUF, and (ii) the stochastic characteristics to generate randomly distributed numbers. In addition, it will underline the conflict between functional robustness and security quality of ICs designed with such devices

Fault Modeling of Spiking Neural Networks with STDP

National audienc

Mémoires émergentes pour les architectures de calcul fiable

My main research skills are related to dependability, test, fault tolerance and reliability of digital systems. At the beginning of my research carrier, these skills were applied to CMOS memories (SRAMs and DRAMs) and then extended to emerging memories (Magnetic and Resistive RAMs). This research was conducted in a context where conventional Von-Neumann architectures and memories are no longer likely to fulfil all the needs of modern applications, due to inherent technological and conceptual limitations. Hence, in order to be at the forefront of the electronic industry in terms of design and manufacturing capabilities, I focussed my research and innovation efforts on study of novel non-Von Neumann architectures enabled by emerging technology devices. Moreover, manufacturing induced variability, defects, stochastic effects, and aging degradation can cause important variations of the electrical characteristics of fabricated devices which can lead to device failure. So naturally, my research activity is focused on identifying the main dependability issues faced by memory-centered ICs and developing suitable test techniques for their detection and design solutions for their mitigation. Aside from reliability, an important aspect of device dependability is related to hardware security. Security systems use cryptographic protocols, frequently built on low-level cryptographic algorithms and primitives, such as Physically Unclonable Functions (PUFs) and True Random Number Generators (TRNGs). The Physically Unclonable Functions (PUFs) are emerging primitives exploited to implement low-cost authentication protocols and cryptographic primitives, such as secure key generators, key storing and one-way functions. State-of-the-art PUF solutions are memory-based and have piqued my interest, leading me to conduct research in the area of design, evaluation and optimization of PUFs and TRNGs. In this HDR presentation, I will give an overview of my research activities up-to-date, I will briefly present the main results I have obtained in each of these four main topics, and I will introduce the audience to my research project

Fiabilité des architectures neuromorphiques

National audienc

Mémoires émergentes pour les architectures de calcul fiable

My main research skills are related to dependability, test, fault tolerance and reliability of digital systems. At the beginning of my research carrier, these skills were applied to CMOS memories (SRAMs and DRAMs) and then extended to emerging memories (Magnetic and Resistive RAMs). This research was conducted in a context where conventional Von-Neumann architectures and memories are no longer likely to fulfil all the needs of modern applications, due to inherent technological and conceptual limitations. Hence, in order to be at the forefront of the electronic industry in terms of design and manufacturing capabilities, I focussed my research and innovation efforts on study of novel non-Von Neumann architectures enabled by emerging technology devices. Moreover, manufacturing induced variability, defects, stochastic effects, and aging degradation can cause important variations of the electrical characteristics of fabricated devices which can lead to device failure. So naturally, my research activity is focused on identifying the main dependability issues faced by memory-centered ICs and developing suitable test techniques for their detection and design solutions for their mitigation. Aside from reliability, an important aspect of device dependability is related to hardware security. Security systems use cryptographic protocols, frequently built on low-level cryptographic algorithms and primitives, such as Physically Unclonable Functions (PUFs) and True Random Number Generators (TRNGs). The Physically Unclonable Functions (PUFs) are emerging primitives exploited to implement low-cost authentication protocols and cryptographic primitives, such as secure key generators, key storing and one-way functions. State-of-the-art PUF solutions are memory-based and have piqued my interest, leading me to conduct research in the area of design, evaluation and optimization of PUFs and TRNGs. In this HDR presentation, I will give an overview of my research activities up-to-date, I will briefly present the main results I have obtained in each of these four main topics, and I will introduce the audience to my research project

Reliability of neuromorphic computing

National audienc

Fully-Connected Single-Layer STT-MTJ-based Spiking Neural Network under Process Variability

International audienc