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unknown
Process variability in sub-16nm bulk CMOS technology
Authors
Ramon Canal Corretger
Joan Figueras Pàmies
Jose Antonio Rubio Sola
Elena Ioana Vatajelu
Publication date
1 January 2012
Publisher
Abstract
The document is part of deliverable D3.6 of the TRAMS Project (EU FP7 248789), of public nature, and shows and justifies the levels of variability used in the research project for sub-18nm bulk CMOS technologies.Postprint (published version
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UPCommons. Portal del coneixement obert de la UPC
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oai:upcommons.upc.edu:2117/156...
Last time updated on 16/06/2016
UPCommons
See this paper in CORE
Go to the repository landing page
Download from data provider
oai:upcommons.upc.edu:2117/156...
Last time updated on 17/04/2020
