Ultra-thin chip package (UTCP) and elastic circuit technologies for compact or conformable sensor and electronics assemblies

This contribution provides an overview of CMST's technologies on flexible ultrathin chip packaging and elastic electronic and sensor circuit technologies and applications

Flexible and stretchable electronics

Conventionally electronics circuits are produced by assembly of packaged components on flat, rigid printed circuit boards. However there is a growing demand for 2.5 dimensional (2.5D free form surfaces) or even full 3D electronics. Applications for such circuits are found in a vast range of fields: such circuits are desirable for comfort and ergonomic reasons (e.g. in wearable or implantable circuits), to respond to design and aesthetics considerations (e.g. 2.5D or 3D light sources), for ecological reasons (more efficient materials usage, less CO2 emissions in automotive applications) etc. In this contribution we will present two technologies, under development at our laboratory, which open the way to industrial production of randomly deformable circuits. These technologies are : • The ultra-thin chip package (UTCP) technology, by which bare Si (or other anorganic semiconductor based) chips are thinned down to a thickness of 20-30µm, embedded in a stack of spin-on polyimide layers, and provided with a fan-out metallization, resulting in an extremely miniaturized, lightweight and flexible chip package with a total thickness below 100µm • A number of technologies for dynamically stretchable (i.e. elastic) circuits, which are based on the interconnection of individual components or component islands with meander shaped thin-film or Printed Circuit Board (PCB) based metal wirings and embedding in elastic polymers like PDMS (silicone rubbers) or PU (polyurethanes). Process flow details, reliability data and applications for these technologies will be presented

Effect of overmolding process on the integrity of electronic circuits

Traditional injection molding processes have been widely used in the plastic processing industry. It is the major processing technique for converting thermoplastic polymers into complicated 3D parts with the aid of heat and pressure. Next generation of electronic circuits used in different application areas such as automotive, home appliances and medical devices will embed various electronic functionalities in plastic products. In this study, over-molding injection molding (OVM) of electronic components will be examined to insert novel performance in polymer materials. This low-cost manufacturing process offers potential benefits such as, reduction in processing time, higher freedom of design and less energy used when compared to the conventional injection molding method. This paper aims to evaluate the performance of this process and propose a series of alternative solutions to optimize the adhesion between and integration of electronics and engineering plastics. A number of methods are used to optimize the process so that the electronic circuits are not damaged during the over-molding, moreover to test the reliability of the system in order to control the continuity of connections between the electronic circuit foils and the electronic components after the OVM process. Correspondingly, we have performed specific tests for this purpose varying in some conditions: the type of injected plastic used, over-molding parameters (temperature, pressure and injection time), electronic circuit design, type of assembled electronic components, type of foils used and the effect of using underfill material below the electronic component. From these tests, first conclusions were made. We have also studied adhesion between the foil and the over-molding material. In this case, various types of engineering plastics have been tested; polypropylene (PP), 30% weight percentage glass,fiber filled polypropylene (GF-PP), Polyamide-6 (PA6) and 50% weight percentage glass fiber filled polyamide-6 (GF-PA6). It was proved that throughout the wide range of tested materials, (PA6) over-molded samples showed a better adhesion on the copper-polyimide foils than the rest. These plastics were over-molded on two types of polyimide (PP/Copper (Cu) tracks foils with and without an adhesive layer between PI and Cu. It was obviously clear that the foils with on adhesive layer between PI and Cu had more delamination in the Cu tracks than the foils without an adhesive layer. Furthermore, it was shown that the presence of an underfill material has on effect on the system as the foils that had an underfill material below their components successfully had a better connection than the folis without an underfill material. Finally, experiments were executed using the two probe method as an electrical measurement and microscope investigation as the visual inspection

A new low cost, elastic and conformable electronics technology for soft and stretchable electronic devices by use of a stretchable substrate

A growing need for ambient electronics in our daily life leads to higher demands from the user in the view of comfort of the electronic devices. Those devices should become invisible to the user, especially when they are embedded in clothes (e.g. in smart textiles). They should be soft, conformable and to a certain degree stretchable. Electronics for implantation on the other hand should ideally be soft and conformable in relation to the body tissue, in order to minimize the rejecting nature of the body to unknown implanted rigid objects. Conformable and elastic circuitry is an emerging topic in the electronics and packaging domain. In this contribution a new low cost, elastic and stretchable electronic device technology will be presented, based on the use of a stretchable substrate. The process steps used are standard PCB fabrication processes, resulting in a fast technology transfer to the industry. This new developed technology is based on the combination of rigid standard SMD components which are connected with 2-D spring-shaped metallic interconnections. Embedding is done by moulding the electronic device in a stretchable polymer. The reliability of the overall system is improved by varying the thickness of the embedding polymer, wherever the presence and type of components requires to. Manufacturability issues are discussed together with the need for good reliability of the stretchable interconnections when stress is applied during stretching

Flexible and stretchable circuit technologies for space applications

Flexible and stretchable circuit technologies offer reduced volume and weight, increased electrical performance, larger design freedom and improved interconnect reliability. All of these advantages are appealing for space applications. In this paper, two example technologies, the ultra-thin chip package (UTCP) and stretchable moulded interconnect (SMI), are described. The UTCP technology results in a 60 µm thick chip package, including the embedding of a 20 µm thick chip, laser or protolithic via definition to the chip contacts and application of fan out metallization. Imec’s stretchable interconnect technology is inspired by conventional rigid and flexible printed circuit board (PCB) technology. Stretchable interconnects are realized by copper meanders supported by a flexible material e.g. polyimide. Elastic materials, predominantly silicone rubbers, are used to embed the conductors and the components, thus serving as circuit carrier. The possible advantages of these technologies with respect to space applications are discussed

Multimode PDMS waveguides fabricated using a hot-embossing technique

A novel method for fabricating multimode PDMS waveguides is presented. This process is based on a hot-embossing technique and generates high quality optical waveguides without a substantial residual layer after embossing. Furthermore, the process allows for low-cost fabrication since it relies on a replication technique and additionally only commercially available materials are used. The measured propagation loss is smaller than 0.24dB/cm and can be further reduced by improving the master mould quality

Highly efficient impulse-radio ultra-wideband cavity-backed slot antenna in stacked air-filled substrate integrated waveguide technology

An impulse-radio ultra-wideband (IR-UWB) cavity-backed slot antenna covering the [5.9803; 6.9989] GHz frequency band of the IEEE 802.15.4a-2011 standard is designed and implemented in an air-filled substrate integrated waveguide (AFSIW) technology for localization applications with an accuracy of at least 3 cm. By relying on both frequency and time-domain optimization, the antenna achieves excellent IR-UWB characteristics. In free-space conditions, an impedance bandwidth of 1.92 GHz (or 29.4%), a total efficiency higher than 89%, a front-to-back ratio of at least 12.1 dB, and a gain higher than 6.3 dBi are measured in the frequency domain. Furthermore, a system fidelity factor larger than 98% and a relative group delay smaller than 100 ps are measured in the time domain within the 3 dB beamwidth of the antenna. As a result, the measured time-of-arrival of a transmitted Gaussian pulse, for different angles of arrival, exhibits variations smaller than 100 ps, corresponding to a maximum distance estimation error of 3 cm. Additionally, the antenna is validated in a real-life worst-case deployment scenario, showing that its characteristics remain stable in a large variety of deployment scenarios. Finally, the difference in frequency-and time-domain performance is studied between the antenna implemented in AFSIW and in dielectric filled substrate integrated waveguide (DFSIW) technology. We conclude that DFSIW technology is less suitable for the envisaged precision IR-UWB localization application

High yield fabrication process for 3D-stacked ultra-thin chip packages using photo-definable polyimide and symmetry in packages

Getting output of multiple chips within the volume of a single chip is the driving force behind development of this novel 3D integration technology, which has a broad range of industrial and medical electronic applications. This goal is achieved in a two-step approach. At first thinned dies are embedded in a polyimide interposer with a fine-pitch metal fan-out resulting Ultra-Thin Chip Packages (UTCP), next these UTCPs are stacked by lamination. Step height at the chip edge of these UTCPs is the major reason of die cracking during the lamination. This paper contains an approach to solve this issue by introduction of an additional layer of interposer which makes it flat at the chip edge and thus the whole packages is named as “Flat-UTCP”. In addition to that, randomness in non-functional package positions per panel reduces the overall yield of the whole process up to certain extent. A detailed analysis on these two issues to improve the process yield is presented in this paper. 3D-stacked memory module composed of 4 EEPROM dies was processed and tested to demonstrate this new concept for enhancing the fabrication yield