Effect of Different Wheatstone Bridge Configurations on Sensitivity and Linearity of MEMS Piezoresistive Intracranial Pressure Sensors

Monitoring of intracranial pressure for traumatic brain injured patients is very critical.  Many intracranial pressure monitoring systems use the MEMS piezoresistive pressure sensor to measure the signal.  The piezoresistive pressure sensor is very sensitive to temperature change.  Hence, the Wheatstone bridge circuit is normally employed in this type of sensor to lessen the effect of temperature variation.  This paper presents the effect of using different configurations of Wheat-stone bridge on the sensitivity and linearity performances of the piezoresistive intracranial pressure sensor.  Six designs comprise of 3-turns meander shaped piezoresistors ranging from full-bridge to quarter-bridge were simulated using COMSOL Multiphysics.  Based on the simulation results, the number and position of active piezoresistors were found to greatly influence the sensitivity of the sensor.  The latter also influenced the sensors’ linearity error.  The active perpendicular piezoresistor produced the higher change in resistance which gave rise to higher sensitivity, while at the same caused the higher nonlinearity performance.  Overall, the piezoresistive intracranial sensor comprises of full-bridge Wheat-stone circuit produces the highest sensitivity and medium linearity

A novel design of a low-voltage low-loss T-match RF-MEMS capacitive switch

This paper presents a novel design, optimization and analysis of capacitive radio frequency (RF) micro-electromechanical system (MEMS) switch. The design incorporates a novel membrane and beams’ structure with two short high-impedance transmission-line (T-line) sections added on either side of the switch (namely T-match switch) to improve its RF performance, while maintaining low-actuation voltage. The short high-impedance T-line section has narrower width and higher impedance than the coplanar waveguide (CPW)’s signal line, behaves as series inductor to compensate the switch’s up-state capacitance and provides excellent matching at the design frequency. This high-impedance T-line section was designed, simulated and optimized using finite-element-modelling (FEM) tool of electromagnetic (EM) simulator of AWR Design EnvironmentTM. The optimized T-line section’s width and length is 10 µm and 70 µm, respectively. The RF-MEMS switch is actuated by electrostatic force with low-actuation voltage of 2.9 V, has maximum von Mises stress of 13.208 MPa which is less than aluminium’s yield stress and can be operated in robust conditions. Compared to the normal capacitive RF-MEMS switch, this T-match capacitive RF-MEMS switch with two sections of optimized high-impedance T line has improved the performance of return loss and insertion loss, at switch-on state, by 45.83% and 55.35%, respectively; while at the switch-off state, the isolation is increased by 24.05%; only the switch-off return loss is degraded by 11.7% but the value (− 0.5519 dB) is still located in the range of design specifications. The RF-MEMS switch’s actuation time was simulated to be ~ 27 µs with amplitude of 5 V up-step voltage

Design consideration of N-drift region doping concentration in high voltage VDMOS transistor

N-drift doping concentration has important contribution in determining the breakdown voltage and on-resistance of the device. It should be well considered because higher N- drift doping concentration can minimize the on-resistance of the device, but also lowering breakdown voltage of the device that expected to be high. It also has a proportional relationship with threshold voltage degradation caused by hot carrier injection. So the variation of N-drift doping concentration can be used to optimize the VDMOS transistor performance

Compatibility Analysis of Silicon Nitride and Silicon Dioxide on HCI induced LDD MOSFET

Hot-carrier-injection (HCI) is one of important reliability issue under short-channel effect in modern MOSFET devices especially in nano-scaled CMOS technology circuits. The effect of the hot carrier can be reduced by introducing Lightly-Doped-Drain (LDD) structure on the device. The objective of this project is to study the effect of hot carrier in the LDD n-MOSFET. The LDD n-MOSFET is stressed with bias voltage at intervals of stressing time to determine the degradation model in the threshold voltage and drain current. From the parametrical analysis, it shows that the shift in threshold voltage and degradation in the drain current occurred after the MOSFET device is stressed with hot carrier stress test. The rate of threshold voltage shift and degradation of the drain current are dependence to the stressing time applied to the MOSFET device. The hot carrier stress test shows that the device with Si3N4 has smaller voltage shift compared to SiO2 material

Binding characteristics study for dengue virus non-structural protein 1 of antigen and its antibody by using circular dichroism technique

This paper presents the binding characteristics study of dengue non-structural protein 1 (NS1) antigen and its antibody using circular dichroism technique in far UV region. Circular dichroism (CD) is a spectroscopic technique which measures differences in the absorption of left-handed and right handed circularly polarized light. The CD spectrum can determine conformation of the NS1 antigen and its antibody, conformational changes of the antigen-antibody interaction and estimates the secondary structure of these proteins in far UV region. Firstly, CD spectrum of individual solutions of the antigen and the antibody were measured. Then, the solutions were mixed to produce a solution of complex dengue NS1 antigen and its antibody for measurement. The findings show that the antibody has the highest positive band of CD intensity follow by the complex antigen-antibody and antigen. The antibody is a chiral structure, has high helical conformation and more ordered epitope structure. Meanwhile, the NS1 antigen shows the negative and the lowest CD spectrum. The antigen is low chirality and has more random-like conformation. The complex (binding of the antigen and antibody) has the CD spectrum's shape similar to the antibody but in lower intensity. So, it has helical and beta conformations lower than the antibody. The binding characteristics of the complex solutions were also studied with increased in incubation time and with varied rotation applied. It is found that the immunoreactions between the antigen and its antibody are rapid processes which do not require too long incubation time. Besides, the applied rotation can increased the immunoreaction process

Pembangunan kaedah reka bentuk dan fabrikasi diafram beralun silikon menggunakan teknik punaran anisotropik KOH

This study is on the development of a new design method of silicon corrugated diaphragm using KOH anisotropic etching technique. Design rules for designing and fabricating corrugated silicon diaphragm structures were developed based on the application of the design rules for corrugated metal diaphragm structures which is later being modified. The KOH etching process has been performed by using etching simulation tool of Intellisuite AnisE in order to realize the corrugated structures on the silicon wafer prior to the fabrication process. The disparity of the etching error percentage, De was found to be too small between the simulated and experimental results which are 0.15

On-Chip Meander Line N-Well Resistor with Shielded Ground Conductor for Q-Factor Improvement

The on-chip meander line n-well resistor with a shielded ground conductor inserted parallel between the meander line on the silicon substrate is studied. The new design configuration concept with the shielded ground conductor improved the Q factor compared to those without the shielded ground conductor operating at high frequency. It was confirmed that the design configuration for the shielded ground conductor with a larger coverage area and increasing the number of parallel with the meander signal line was significant in improving the Q-factor performance operating at high frequency. Using this improvement method, the Q-factor value for proposed design meander line n-well structure with shielded ground conductor at 2 µm width in two T shapes has improved around 8% to 9% at 8, 9, and 10 GHz and reduced the parasitic mutual capacitance by 49.35 fF at 10 GHz when compared to the conventional structure of meander line n-well resistors. Shielded ground conductor technique is effective due to reduction of parasitic mutual capacitance. The resulting simulation of the return loss was improved using the shielded ground conductor method, but has poor of insertion loss, due to the skin effect. Overall, it has better performance compared to other designs because it has had significant improvement for Q factor to beyond 4 GHz and better return loss for all the range of frequency

A comparative study of lifetime reliability of planar MOSFET and FinFET due to BTI for the 16 nm CMOS technology node based on reaction-diffusion model

Intensive scaling of Integrated Circuits is a crucial factor for achieving high performance and astronomical packing density. However, this scaling is pushing planar MOSFET to its physical limitations. Nowadays, FinFET emerges as a promising alternative technology for planar MOSFET, due to their better efficiency. Nevertheless, this inevitably leads to a rising concern on the reliability of FinFET as the circuit lifetime reliability cannot be neglected due to this accelerated scaling of Integrated Circuits. This paper is considered as the first work that: 1) detects which CMOS technology, planar MOSFET or FinFET, is more robust against Bias Temperature Instability (BTI) aging degradation for the advanced nodes such as 16 nm; 2) precisely computes the effect of BTI on 16 nm FinFET using an adequate BTI Reaction Diffusion model that takes into consideration the effects of finite oxide thickness, and the influence of polysilicon; 3) investigates the efficiency in terms of power consumption and area for the predominant circuit level techniques that could be implemented to overcome the negative impact of BTI for FinFET technology. This research clearly indicates that FinFET technology is more robust against BTI aging degradation than planar MOSFET as the delay percentage for FinFET technology is lower than planar MOSFET technology by 26%. © 2019 Elsevier Lt

Linearity improvement of differential CMOS low noise amplifier

This paper presents the linearity improvement of differential CMOS low noise amplifier integrated circuit using 0.13um CMOS technology. In this study, inductively degenerated common source topology is adopted for wireless LAN application. The linearity of the single-ended LNA was improved by using differential structures with optimum biasing technique. This technique achieved better LNA and linearity performance compare with single-ended structure. Simulation was made by using the cadence spectre RF tool. Consuming 5.8mA current at 1.2V supply voltage, the designed LNA exhibits S21 gain of 18.56 dB, noise figure (NF) of 1.85 dB, S11 of −27.63 dB, S22 of-34.33 dB, S12 of −37.09 dB and IIP3 of-7.79 dBm. © 2019, Institute of Advanced Engineering and Science. All rights reserved