On a Multiprocessor Computer Farm for Online Physics Data Processing

The topic of this thesis is the design-phase performance evaluation of a large multiprocessor (MP) computer farm intended for the on-line data processing of the Compact Muon Solenoid (CMS) experiment. CMS is a high energy Physics experiment, planned to operate at CERN (Geneva, Switzerland) during the year 2005. The CMS computer farm is consisting of 1,000 MP computer systems and a 1,000 X 1,000 communications switch. The followed approach to the farm performance evaluation is through simulation studies and evaluation of small prototype systems building blocks of the farm. For the purposes of the simulation studies, we have developed a discrete-event, event-driven simulator that is capable to describe the high-level architecture of the farm and give estimates of the farm's performance. The simulator is designed in a modular way to facilitate the development of various modules that model the behavior of the farm building blocks in the desired level of detail. With the aid of this simulator, we make a particular study on the scheduling of the nodes of the farm, showing that a preemptive scheduling can increase farm's throughput. We have developed a prototype setup of a farm node an event filter unit. The setup consists of a high performance MP system (the farm node) connected to a second computer system (used to emulate the data sources) through an ATM network. The performance issues of interfacing a network interface controller (NIC) to the application running in the farm node, are explored. It is shown with the aid of this setup, that the switch-to-farm interface (SFI) a device used to put together the incoming data fragments into a single entity can be entirely avoided by emulating its function in software. We show that in order to meet the required event assembly performance in the filter node inputs, the development effort has to concentrate on the NIC hardware, software and its interface to the application, rather than building a custom designed device specialized to perform the task of event assembly. Finally, the farm scaling issues are investigated. Our aim is to obtain an "operational region" inside the farm configuration space, when the various networking speeds are taken into account. Analytically obtained results that have been confirmed with the above mentioned simulator, are discussed. We present also results showing the influence 8 of the inherent to the farm parameters (like the algorithm rejection factor) on the requirements for the farm building blocks (sustained I/O bandwidth) of the inherent to the farm parameters (like the algorithm rejection factor) on the requirements for the farm building blocks (sustained I/O bandwidth)

Unfolding the Intra-organisational Perception Gap in Decision Making

This chapter explores the dyadic relationship between headquarters and in terms of their perceptions of decision-making loci and associated organisational structure. By comparing the responses of parents of Greek Multinational Enterprises (MNEs) and their subsidiaries, we find evidence in favour of a perception gap in terms of decision-making between headquarters and subsidiaries. We argue that future research needs to carefully consider and account for the perception gap and point out the importance of the role of MNE managers in removing such barriers in order to achieve effective decision-making

Wireless power transfer to a small, remote control boat

Over the past few decades, researchers have explored and implemented methods of wireless power transmission to operate devices that traditionally have been powered using plug-in power supplies and batteries. It is with this objective in mind that we built a boat, which is powered wirelessly from a field of harvestable energy. This project sought to develop a wirelessly powered remote control boat to be a proof of concept for the idea of wireless power transfer. Our criteria for success is that the boat should receive sufficient power to run anywhere in a 2.5 meter squared area. Having defined the field in which power will be required by our boat, we will fill this field with microwave RF energy. Finally, using a rectifying antenna, or rectenna, the energy will be harvested and delivered to the boat’s motors. We first developed three different topologies for our motor boat. For each boat, we made the minimization of power consumption a priority, while still maintaining speed and control. Operating between 100 and 200 milliwatts, each of the three topologies has a unique advantages and disadvantages with respect to its power consumption, speed, and controllability, and each has the ability to be powered wirelessly. From here, we plan to combine the rectenna with the boat, and deliver the power to our system. We will then characterize the radiation pattern of our power-receiving monopole antenna, and quantify the efficiencies of our various rectifier topologies

Design, fabrication, and characterization of a compact hierarchical manifold microchannel heat sink array for two-phase cooling

High-heat-flux removal is critical for the nextgeneration electronic devices to reliably operate within their temperature limits. A large portion of the thermal resistance in a traditional chip package is caused by thermal resistances at interfaces between the device, heat spreaders, and the heat sink; embedding the heat sink directly into the heat-generating device can eliminate these interface resistances and drastically reduce the overall thermal resistance. Microfluidic cooling within the embedded heat sink improves the heat dissipation, with two-phase operation offering the potential for dissipation of very high heat fluxes while maintaining moderate chip temperatures. To enable multichip stacking and other heterogeneous packaging approaches, it is important to densely integrate all fluid flow paths into the device; volumetric heat dissipation emerges as a performance metric in this new heat sinking paradigm. In this paper, a compact hierarchical manifold microchannel design is presented that utilizes an integrated multilevel manifold distributor to feed coolant to an array of microchannel heat sinks. The flow features in the manifold layers and microchannels are fabricated in silicon wafers using deep reactive-ion etching. The heat source is simulated via Joule heating using thin-film platinum heaters. The on-chip spatial temperature measurements are made using four-wire resistance temperature detectors. The individual manifold layers and the microchannel-bearing wafers are diced and bonded into a sealed stack via thermocompression bonding using gold layers at the mating surfaces. Thermal and hydrodynamic testing is performed by pumping the dielectric fluid HFE-7100 through the device at a known flow rate

Characterization of Hierarchical Manifold Microchannel Heat Sink Arrays under Simultaneous Background and Hotspot Heating Conditions

A hierarchical manifold microchannel heat sink array is fabricated and experimentally characterized for uniform heat flux dissipation over a footprint area of 5 mm x 5 mm. A 3 x 3 array of heat sinks is fabricated into the silicon substrate containing the heaters for direct intrachip cooling, eliminating the thermal resistances typically associated with the attachment of a separate heat sink. The heat sinks are fed in parallel using a hierarchical manifold distributor that delivers flow to each of the heat sinks. Each heat sink contains a bank of high-aspect-ratio microchannels; five different channel geometries with nominal widths of 15 lm and 33 micrometers and nominal depths between 150 micrometers and 470 micrometers are tested. The thermal and hydraulic performance of each heat sink array geometry is evaluated using HFE-7100 as the working fluid, for mass fluxes ranging from 600 kg/m2 s to 2100 kg/m2 s at a constant inlet temperature of 59 degree C. To simulate heat generation from electronics devices, a uniform background heat flux is generated with thin-film serpentine heaters fabricated on the silicon substrate opposite the channels; temperature sensors placed across the substrate provide spatially resolved surface temperature measurements. Experiments are also conducted with simultaneous background and hotspot heat generation; the hotspot heat flux is produced by a discrete 200 micrometers x 200 micrometers hotspot heater. Heat fluxes up to 1020 W/cm2 are dissipated under uniform heating conditions at chip temperatures less than 69 degree C above the fluid inlet and at pressure drops less than 120 kPa. Heat sinks with wider channels yield higher wetted-area heat transfer coefficients, but not necessarily the lowest thermal resistance; for a fixed channel depth, samples with narrower channels have increased total wetted areas owing to the smaller fin pitches. During simultaneous background and hotspot heating conditions, background heat fluxes up to 900 W/cm2 and hotspot fluxes up to 2700 W/cm2 are dissipated. The hotspot temperature increases linearly with hotspot heat flux; at hotspot heat fluxes of 2700 W/cm2, the hotspot experiences a temperature rise of 16 degree C above the average chip temperature

A Hierarchical Manifold Microchannel Heat Sink Array for High-Heat-Flux Two-Phase Cooling of Electronics

High-heat-flux removal is necessary for next-generation microelectronic systems to operate more reliably and efficiently. Extremely high heat removal rates are achieved in this work using a hierarchical manifold microchannel heat sink array. The microchannels are imbedded directly into the heated substrate to reduce the parasitic thermal resistances due to contact and conduction resistances. Discretizing the chip footprint area into multiple smaller heat sink elements with high-aspect-ratio microchannels ensures shortened effective fluid flow lengths. Phase change of high fluid mass fluxes can thus be accommodated in micron-scale channels while keeping pressure drops low compared to traditional, microchannel heat sinks. A thermal test vehicle, with all flow distribution components heterogeneously integrated, is fabricated to demonstrate this enhanced thermal and hydraulic performance. The 5 mm x 5 mm silicon chip area, with resistive heaters and local temperature sensors fabricated directly on the opposite face, is cooled by a 3 x 3 array of microchannel heat sinks that are fed with coolant using a hierarchical manifold distributor. Using the engineered dielectric liquid HFE-7100 as the working fluid, experimental results are presented for channel mass fluxes of 1300, 2100, and 2900 kg/m2 s and channel cross sections with nominal widths of 15 micrometers and nominal depths of 35 micrometers, 150 micrometers, and 300 micrometers. Maximum heat flux dissipation is shown to increase with mass flux and channel depth and the heat sink with 15 micrometers x 300 micrometers channels is shown to dissipate base heat fluxes up to 910 W/cm2 at pressure drops of less than 162 kPa and chip temperature rise under 47 degrees C relative to the fluid inlet temperature

Enlargement of Submicron Gas‐Borne Particles by Heterogeneous Condensation for Energy‐Efficient Aerosol Separation

To improve the efficiency of aerosol separation, a process sequence for particle enlargement by condensation of water vapor on their surface is suggested. The presented method makes use of packed columns in non-equilibrium operation to achieve supersaturation, which is required for droplet growth. Although this method is known for several years, it is not widely used in industrial processes and still needs accurate investigations for consolidation and establishment. The simulation tool AerCoDe3.0 for predicting saturation and particle growth in packed columns allows investigating the thermal energy consumption under various operation conditions. Based on the results obtained in this study, optimized arrangements of columns, which are applicable as preconditioning step for existing particle separators, are proposed