Run-time transmission power reconfiguration and adaptive packet relocation in wireless network-on-chip

Network-on-chip (NoC) is an on-chip communication network that allows parallel communication between all cores to improve inter-core performance. Wireless NoC (WiNoC) introduces long-range and high bandwidth radio frequency (RF) interconnects that can possibly reduce the multi-hop communication of the planar metal interconnects in conventional NoC platforms. In WiNoC, RF transceivers account for a significant power consumption, particularly its transmitter, out of its total communication energy. CurrentWiNoC architectures employ constant maximum transmitting power for communicating radio hubs regardless of physical location of the receiver radio hubs. Besides, high transmission power consumption in WiNoC with constant maximum power suffers from significant energy and load imbalance among RF transceivers which lead to hotspot formation, thus affecting the reliability of the onchip network system. There are two main objectives covered by this thesis. Firstly, this work proposes a reconfigurable transmitting power control scheme that, by using bit error rate (BER) estimation obtained at the receiver’s side, dynamically calibrates the transmitting power level needed for communication between the source and destination radio hubs. The proposed scheme achieves significant total system energy reduction by about 40% with an average performance degradation of 3% and with no impact on throughput. The proposed design utilizes a small fraction of both area and power overheads (about 0.1%) out of total transceiver properties. The proposed technique is generic and can be applied to any WiNoC architecture for improving its energy efficiency with a negligible overhead in terms of silicon area. Secondly, an energyaware adaptive packet relocator scheme has been proposed. Based on transmission energy consumption and predefined energy threshold, packets are routed to adjacent transmitter for communication with receiver radio hub, with an aim to balance energy distribution in WiNoC. The proposed strategy alone achieves total communication energy savings of about 8%. A joint scheme of the reconfigurable transmitting power management and energy-aware adaptive packet relocator is also introduced. The scheme consistently results in an energy savings of 30% with minimal performance degradation

HEVC 2D-DCT architectures comparison for FPGA and ASIC implementations

This paper compares ASIC and FPGA implementations of two commonly used architectures for 2-dimensional discrete cosine transform (DCT), the parallel and folded architectures. The DCT has been designed for sizes 4x4, 8x8, and 16x16, and implemented on Silterra 180nm ASIC and Xilinx Kintex Ultrascale FPGA. The objective is to determine suitable low energy architectures to be used as their characteristics greatly differ in terms of cells usage, placement and routing methods on these platforms. The parallel and folded DCT architectures for all three sizes have been designed using Verilog HDL, including the basic serializer-deserializer input and output. Results show that for large size transform of 16x16, ASIC parallel architecture results in roughly 30% less energy compared to folded architecture. As for FPGAs, folded architecture results in roughly 34% less energy compared to parallel architecture. In terms of overall energy consumption between 180nm ASIC and Xilinx Ultrascale, ASIC implementation results in about 58% less energy compared to the FPGA

Graphene Nanoribbon Simulator of Vacancy Defects On Electronic Structure

Graphene Nanoribbon Simulator (GNRSIM) is developed using MATLAB Graphical User Interface Development Environment to study the electronics properties of graphene nanoribbons (GNRs). The main focus of this research is the simulation effects of single vacancy 1 in graphene nanoribbons lattices on electronic structure. The band structure and density of states are explored by using tight binding approximation where a Hamiltonian operator with nearest-neighbor interactions is introduced. The simulator has a wide range of input parameters where user can select armchair or zigzag GNR. The size of the lattices namely width and length can be varied. The location of the vacancy defect can be pinpoint by providing the row and column of the missing atom. The limitation of GNRSIM at present is that it can only accept a single atom vacancy. GNRSIM is able to be executed as a standalone application software in understanding the fundamental properties of semiconductor material and device engineering through ab-initio calculations

Graphene nanoribbon simulator of vacancy defects on electronic structure

Graphene Nanoribbon Simulator (GNRSIM) is developed using MATLAB Graphical User Interface Development Environment to study the electronics properties of graphene nanoribbons (GNRs). The main focus of this research is the simulation effects of single vacancy 1 in graphene nanoribbons lattices on electronic structure. The band structure and density of states are explored by using tight binding approximation where a Hamiltonian operator with nearest-neighbor interactions is introduced. The simulator has a wide range of input parameters where user can select armchair or zigzag GNR. The size of the lattices namely width and length can be varied. The location of the vacancy defect can be pinpoint by providing the row and column of the missing atom. The limitation of GNRSIM at present is that it can only accept a single atom vacancy. GNRSIM is able to be executed as a standalone application software in understanding the fundamental properties of semiconductor material and device engineering through ab-initio calculations

Influence of single vacancy defect at varying length on electronic properties of zigzag graphene nanoribbons

Graphene, identified in 2004, is now an established two-dimensional (2D) material due to its outstanding physical and electronic characteristics namely its superior electrical conductivity. Graphene is a zero-gap material that has linear dispersion with electron-hole symmetry. As pristine sheet, it cannot be utilized in digital logic application without the induction of a band gap inside the band structure. In our work, the modeling and simulation of graphene nanoribbons (GNRs) are carried out to determine its electronics properties that are benchmarked with other published simulation data. A 4-Zigzag GNRs (4-ZGNRs) under different length are utilized. A single vacancy defects is introduced at various positions inside the atomic structure. The theoretical model is implemented based on single-neighbour tight binding technique coupled with a non-equilibrium Green’s function formalism. The single vacancy defects are represented by the elimination of tight binding energies in the Hamiltonian matrix. Subsequently, these matrix elements are utilized to compute dispersion relation and density of states (DOS) through Green’s function. It is found that single vacancy defects at different positions in 4-ZGNRs’ atomic structure under varying length has no significant impacts on the sub-band structure but these vacancies impact the DOS that are computed throught Green’s function approach

Wireless sensor network for smart power management

Wireless Sensor Network has been widely applied in broad fields in line with current emerging trends, such as automatic control, automated meter reading, power management, etc. Having this system in place provides convenience, increases efficiency and result in well-managed system. The aim of this project is to develop a smart power management system using wireless sensor network. The system is developed by using an unlicensed radio frequency (RF) band where communication takes place between the main controller unit and sensor nodes on the basis of current consumption at every node. Each sensor node will sense current consumption of a dedicated device assigned to it. Data acquisition from the main controller is flexible to operate in round robin or interrupt service routine (ISR) manner. Power consumed by each device which is proportionate to the value measured by the sensor node will be calculated at the main controller and stored in a database within the main controller itself. As many sensor nodes can be placed as possible within the distance range of the main controller (40 meters indoor and 120 meters outdoor line-of-sight). Throughout this project, hardware and software development were done concurrently in order to optimize the time consumption. Validation and verification process includes calibration of current sensor used and experimenting current measurement of several electrical appliances, such as 240V – 12V transformer, electric kettle and hair dryer. Measured device activity can be controlled by placing an electromechanical switch to switch the power ON or OFF

On the impact of routing and network size for wireless network-on-chip performance

wireless network on-Chip or WiNoC is an alternative to traditional planar on-chip networks. On-chip wireless links are utilized to reduce latency between distant nodes due to its capability to communicate with far-away node within a single hop. this paper analyzes the impact of various routing schemes and the effect of WiNoC sizes on network traffic distributions compared to conventional mesh NoC. radio hubs (4x4) are evenly placed on WiNoC to analyze global average delay, throughput, energy consumption and wireless utilization. For validation, three various network. sizes (8x8, 16x16 and 32x2) of mesh NoC and WiNoC architectures are simulated on cycle-accurate Noxim simulator under numerous traffic load distributions. Simulation results show that WiNoC architecture with the 16x16 network size has better average speedup (~1.2x) and improved network throughputs by 6.36% in non-uniform transpose traffic distribution. However, as the trade-off, WiNoC requires 63% higher energy consumption compared to the classical wired NoC mesh