Asymmetric Price Transmission and Non-linear Adjustment in the Iranian Mutton Market

This paper analyses the asymmetric price transmission and non-linear adjustment at the farm and retail levels in the Iran’s mutton market. We applied a multivariate threshold error correction mechanism for monthly price data. We tested the non-linear adjustment using sup-LR, sup-LM and sup-Wald tests. The results confirm the presence of non-linear cointegration relationship between the retail and farm prices. In short-run, the price transmission behavior reveals that reactions of both the retail and farm prices to positive and negative deviations from the long-run price spread are asymmetric. More specially, the retailers show more strong responses to the both positive and negative shocks imposed to the farmers.Threshold Cointegration, Non-linearity, Mutton, Price, Iran, Livestock Production/Industries,

A low-power, high-performance speech recognition accelerator

© 2019 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes,creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.Automatic Speech Recognition (ASR) is becoming increasingly ubiquitous, especially in the mobile segment. Fast and accurate ASR comes at high energy cost, not being affordable for the tiny power-budgeted mobile devices. Hardware acceleration reduces energy-consumption of ASR systems, while delivering high-performance. In this paper, we present an accelerator for largevocabulary, speaker-independent, continuous speech-recognition. It focuses on the Viterbi search algorithm representing the main bottleneck in an ASR system. The proposed design consists of innovative techniques to improve the memory subsystem, since memory is the main bottleneck for performance and power in these accelerators' design. It includes a prefetching scheme tailored to the needs of ASR systems that hides main memory latency for a large fraction of the memory accesses, negligibly impacting area. Additionally, we introduce a novel bandwidth-saving technique that removes off-chip memory accesses by 20 percent. Finally, we present a power saving technique that significantly reduces the leakage power of the accelerators scratchpad memories, providing between 8.5 and 29.2 percent reduction in entire power dissipation. Overall, the proposed design outperforms implementations running on the CPU by orders of magnitude, and achieves speedups between 1.7x and 5.9x for different speech decoders over a highly optimized CUDA implementation running on Geforce-GTX-980 GPU, while reducing the energy by 123-454x.Peer ReviewedPostprint (author's final draft

Leveraging run-time feedback for efficient ASR acceleration

© 2019 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes,creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.In this work, we propose Locality-AWare-Scheme (LAWS) for an Automatic Speech Recognition (ASR) accelerator in order to significantly reduce its energy consumption and memory requirements, by leveraging the locality among consecutive segments of the speech signal. LAWS diminishes ASR's workload by up to 60% by removing most of the off-chip accesses during the ASR's decoding process. We furthermore improve LAWS's effectiveness by selectively adapting the amount of ASR's workload, based on run-time feedback. In particular, we exploit the fact that the confidence of the ASR system varies along the recognition process. When confidence is high, the ASR system can be more restrictive and reduce the amount of work. The end design provides a saving of 87% in memory requests, 2.3x reduction in energy consumption, and a speedup of 2.1x with respect to the state-of-the-art ASR accelerator.Peer ReviewedPostprint (author's final draft

An ultra low-power hardware accelerator for automatic speech recognition

Automatic Speech Recognition (ASR) is becoming increasingly ubiquitous, especially in the mobile segment. Fast and accurate ASR comes at a high energy cost which is not affordable for the tiny power budget of mobile devices. Hardware acceleration can reduce power consumption of ASR systems, while delivering high-performance. In this paper, we present an accelerator for large-vocabulary, speaker-independent, continuous speech recognition. It focuses on the Viterbi search algorithm, that represents the main bottleneck in an ASR system. The proposed design includes innovative techniques to improve the memory subsystem, since memory is identified as the main bottleneck for performance and power in the design of these accelerators. We propose a prefetching scheme tailored to the needs of an ASR system that hides main memory latency for a large fraction of the memory accesses with a negligible impact on area. In addition, we introduce a novel bandwidth saving technique that removes 20% of the off-chip memory accesses issued during the Viterbi search. The proposed design outperforms software implementations running on the CPU by orders of magnitude and achieves 1.7x speedup over a highly optimized CUDA implementation running on a high-end Geforce GTX 980 GPU, while reducing by two orders of magnitude (287x) the energy required to convert the speech into text.Peer ReviewedPostprint (author's final draft

Strengthening mechanisms of graphene sheets in aluminium matrix nanocomposites

Uniform dispersion of SiC nanoparticles with a high propensity to agglomerate within a thixoformed aluminium matrix was attained using a graphene encapsulating approach. The analytical model devised in this study has demonstrated the significant role of shear lag and thermally activated dislocation mechanisms in strengthening aluminium metal matrix composites due to the exceptional negative thermal expansion coefficient of graphene sheets. This, in turn, triggers the pinning capacity of nano-sized rod-liked aluminium carbide, prompting strong interface bonding for SiC nanoparticles with the matrix, thereby enhancing tensile elongation

Fabrication of aluminum matrix composites reinforced with nano- to micrometer-sized SiC particles

In this study, the hot extrusion process was applied to stir cast aluminum matrix–SiC composites in order to improve their microstructure and reduce cast part defects. SiC particles were ball milled with Cr, Cu, and Ti as three forms of carrier agents to improve SiC incorporation. Large brittle ceramic particles (average particle size: 80 μm) were fragmented during ball-milling to form nanoparticles in order to reduce the cost of composite manufacturing. The experimental results indicate that full conversion of coarse micron sized to nanoparticles, even after 36 h of ball milling, was not possible. Multi modal SiC particle size distributions which included SiC nanoparticles were produced after the milling process, leading to the incorporation of a size range of SiC particle sizes from about 50 nm to larger than 10 μm, into the molten A356 aluminum alloy. The particle size of the milled powders and the amount of released heat from the reaction between the carrier agent and molten aluminum are inferred as two crucial factors that affect the resultant part tensile properties and microhardness

Estimation and prediction of avoidable health care costs of cardiovascular diseases and type 2 diabetes through adequate dairy food consumption: a systematic review and micro simulation modeling study

Background: Recent evidence from prospective cohort studies show a relationship between consumption of dairy foods and cardiovascular diseases (CVDs) and type 2 diabetes mellitus (T2DM). This association highlights the importance of dairy foods consumption in prevention of these diseases and also reduction of associated healthcare costs. The aim of this study was to estimate avoidable healthcare costs of CVD and T2D through adequate dairy foods consumption in Iran. Methods: This was a multistage modelling study. We conducted a systematic literature review in PubMed and EMBASE to identify any association between incidence of CVD and T2DM and dairy foods intake, and also associated relative risks. We obtained age- and sex-specific dairy foods consumption level and healthcare expenditures from national surveys and studies. Patient level simulation Markov models were constructed to predict the disease incidence, patient population size and associated healthcare costs for current and optimal dairy foods consumption at different time horizons (1, 5, 10 and 20 years). All parameters including costs and transition probabilities were defined as statistical distributions in the models, and all analyses were conducted by accounting for first and second order uncertainty. Results: The systematic review results indicated that dairy foods consumption was inversely associated with incidence of T2DM, coronary heart disease (CHD) and stroke. We estimated that the introduction of a diet containing 3 servings of dairy foods per day may produce a $0.43 saving in annual per capita healthcare costs in Iran in the first year due to saving in cost of CVD and T2DM treatment. The estimated savings in per capita healthcare costs were$8.42, $39.97 and$190.25 in 5, 10 and 20-years’ time, respectively. Corresponding total aggregated avoidable costs for the entire Iranian population within the study time horizons were $33.83,$661.31, $3,138.21 and$14,934.63 million, respectively. Conclusion: Our analysis demonstrated that increasing dairy foods consumption to recommended levels would be associated with reductions in healthcare costs. Further randomized trial studies are required to investigate the effect of dairy foods intake on cost of CVD and T2DM in the population

Ultra low-power, high-performance accelerator for speech recognition

Automatic Speech Recognition (ASR) is undoubtedly one of the most important and interesting applications in the cutting-edge era of Deep-learning deployment, especially in the mobile segment. Fast and accurate ASR comes at a high energy cost, requiring huge memory storage and computational power, which is not affordable for the tiny power budget of mobile devices. Hardware acceleration can reduce power consumption of ASR systems as well as reducing its memory pressure, while delivering high-performance. In this thesis, we present a customized accelerator for large-vocabulary, speaker-independent, continuous speech recognition. A state-of-the-art ASR system consists of two major components: acoustic-scoring using DNN and speech-graph decoding using Viterbi search. As the first step, we focus on the Viterbi search algorithm, that represents the main bottleneck in the ASR system. The accelerator includes some innovative techniques to improve the memory subsystem, which is the main bottleneck for performance and power, such as a prefetching scheme and a novel bandwidth saving technique tailored to the needs of ASR. Furthermore, as the speech graph is vast taking more than 1-Gigabyte memory space, we propose to change its representation by partitioning it into several sub-graphs and perform an on-the-fly composition during the Viterbi run-time. This approach together with some simple yet efficient compression techniques result in 31x memory footprint reduction, providing 155x real-time speedup and orders of magnitude power and energy saving compared to CPUs and GPUs. In the next step, we propose a novel hardware-based ASR system that effectively integrates a DNN accelerator for the pruned/quantized models with the Viterbi accelerator. We show that, when either pruning or quantizing the DNN model used for acoustic scoring, ASR accuracy is maintained but the execution time of the ASR system is increased by 33%. Although pruning and quantization improves the efficiency of the DNN, they result in a huge increase of activity in the Viterbi search since the output scores of the pruned model are less reliable. In order to avoid the aforementioned increase in Viterbi search workload, our system loosely selects the N-best hypotheses at every time step, exploring only the N most likely paths. Our final solution manages to efficiently combine both DNN and Viterbi accelerators using all their optimizations, delivering 222x real-time ASR with a small power budget of 1.26 Watt, small memory footprint of 41 MB, and a peak memory bandwidth of 381 MB/s, being amenable for low-power mobile platforms.Los sistemas de reconocimiento automático del habla (ASR por sus siglas en inglés, Automatic Speech Recognition) son sin lugar a dudas una de las aplicaciones más relevantes en el área emergente de aprendizaje profundo (Deep Learning), specialmente en el segmento de los dispositivos móviles. Realizar el reconocimiento del habla de forma rápida y precisa tiene un elevado coste en energía, requiere de gran capacidad de memoria y de cómputo, lo cual no es deseable en sistemas móviles que tienen severas restricciones de consumo energético y disipación de potencia. El uso de arquitecturas específicas en forma de aceleradores hardware permite reducir el consumo energético de los sistemas de reconocimiento del habla, al tiempo que mejora el rendimiento y reduce la presión en el sistema de memoria. En esta tesis presentamos un acelerador específicamente diseñado para sistemas de reconocimiento del habla de gran vocabulario, independientes del orador y que funcionan en tiempo real. Un sistema de reconocimiento del habla estado del arte consiste principalmente en dos componentes: el modelo acústico basado en una red neuronal profunda (DNN, Deep Neural Network) y la búsqueda de Viterbi basada en un grafo que representa el lenguaje. Como primer objetivo nos centramos en la búsqueda de Viterbi, ya que representa el principal cuello de botella en los sistemas ASR. El acelerador para el algoritmo de Viterbi incluye técnicas innovadoras para mejorar el sistema de memoria, que es el mayor cuello de botella en rendimiento y energía, incluyendo técnicas de pre-búsqueda y una nueva técnica de ahorro de ancho de banda a memoria principal específicamente diseñada para sistemas ASR. Además, como el grafo que representa el lenguaje requiere de gran capacidad de almacenamiento en memoria (más de 1 GB), proponemos cambiar su representación y dividirlo en distintos grafos que se componen en tiempo de ejecución durante la búsqueda de Viterbi. De esta forma conseguimos reducir el almacenamiento en memoria principal en un factor de 31x, alcanzar un rendimiento 155 veces superior a tiempo real y reducir el consumo energético y la disipación de potencia en varios órdenes de magnitud comparado con las CPUs y las GPUs. En el siguiente paso, proponemos un novedoso sistema hardware para reconocimiento del habla que integra de forma efectiva un acelerador para DNNs podadas y cuantizadas con el acelerador de Viterbi. Nuestros resultados muestran que podar y/o cuantizar el DNN para el modelo acústico permite mantener la precisión pero causa un incremento en el tiempo de ejecución del sistema completo de hasta el 33%. Aunque podar/cuantizar mejora la eficiencia del DNN, éstas técnicas producen un gran incremento en la carga de trabajo de la búsqueda de Viterbi ya que las probabilidades calculadas por el DNN son menos fiables, es decir, se reduce la confianza en las predicciones del modelo acústico. Con el fin de evitar un incremento inaceptable en la carga de trabajo de la búsqueda de Viterbi, nuestro sistema restringe la búsqueda a las N hipótesis más probables en cada paso de la búsqueda. Nuestra solución permite combinar de forma efectiva un acelerador de DNNs con un acelerador de Viterbi incluyendo todas las optimizaciones de poda/cuantización. Nuestro resultados experimentales muestran que dicho sistema alcanza un rendimiento 222 veces superior a tiempo real con una disipación de potencia de 1.26 vatios, unos requisitos de memoria modestos de 41 MB y un uso de ancho de banda a memoria principal de, como máximo, 381 MB/s, ofreciendo una solución adecuada para dispositivos móviles

The relationship between the religious beliefs and the feeling of loneliness in elderly

The objective of this research is to study the relationship between the religious beliefs and the feeling of loneliness in elderly. In this descriptive correlation study, the statistical society included 100 individuals of the society of retired people in the Medical University of Gilan province in Iran. The sample was taken by the easy random method. The method of collecting data was the questionnaire contained 3 parts: 1) personal characteristics and social characteristics. 2) Allport's internal and external religious beliefs scale and 3) the Standard loneliness feeling of You care. Data was analyzed by means of the description and presumption statistical methods and use of the SPSS software. The findings showed that there is a meaningful correlation between the external religious beliefs and the marital status, the amount of income, socialization with family members and relatives, social activities and also between the internal religious beliefs and the attending in the religious gatherings, the emotional support of the family, friends, and the others and the general satisfaction of the mentioned supports with P<0.05 and finally with the use of the nonparametric testes, a meaningful relationship has been found between the religious beliefs and the feeling of loneliness with P<0.001. Thus this study shows that the religious believes as an important source of support in aged people, can help them to be healthier physically and psychologically and it is essential to consider it for the mental health educational plans. © Indian Society for Education and Environment (iSee)