14 research outputs found

    Nickel-Catalyzed Asymmetric Reductive Cross-Coupling of a-Chloroesters with (Hetero)Aryl Iodides

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    An asymmetric reductive cross-coupling of alpha-chloroesters and (hetero)aryl iodides is reported. This nickel-catalyzed reaction proceeds with a chiral BiOX ligand under mild conditions, affording alpha-arylesters in good yields and enantioselectivities. The reaction is tolerant of a variety of functional groups, and the resulting products can be converted to pharmaceutically-relevant chiral building blocks. A multivariate linear regression model was developed to quantitatively relate the influence of the alpha-chloroester substrate and ligand on enantioselectivity

    Nickel-Catalyzed Asymmetric Reductive Cross-Coupling of a-Chloroesters with (Hetero)Aryl Iodides

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    An asymmetric reductive cross-coupling of alpha-chloroesters and (hetero)aryl iodides is reported. This nickel-catalyzed reaction proceeds with a chiral BiOX ligand under mild conditions, affording alpha-arylesters in good yields and enantioselectivities. The reaction is tolerant of a variety of functional groups, and the resulting products can be converted to pharmaceutically-relevant chiral building blocks. A multivariate linear regression model was developed to quantitatively relate the influence of the alpha-chloroester substrate and ligand on enantioselectivit

    Charon: Specialized near-memory processing architecture for clearing dead objects in memory

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    © 2019 Association for Computing Machinery.programming, saving a programmer from many nasty memoryrelated bugs. However, these productivity benefits come with a cost in terms of application throughput, worst-case latency, and energy consumption. Since the first introduction of GC by the Lisp programming language in the 1950s, a myriad of hardware and software techniques have been proposed to reduce this cost. While the idea of accelerating GC in hardware is appealing, its impact has been very limited due to narrow coverage, lack of flexibility, intrusive system changes, and significant hardware cost. Even with specialized hardware GC performance is eventually limited by memory bandwidth bottleneck. Fortunately, emerging 3D stacked DRAM technologies shed new light on this decades-old problem by enabling efficient near-memory processing with ample memory bandwidth. Thus, we propose Charon1, the first 3D stacked memory-based GC accelerator. Through a detailed performance analysis of HotSpot JVM, we derive a set of key algorithmic primitives based on their GC time coverage and implementation complexity in hardware. Then we devise a specialized processing unit to substantially improve their memory-level parallelism and throughput with a low hardware cost. Our evaluation of Charon with the full-production HotSpot JVM running two big data analytics frameworks, Spark and GraphChi, demonstrates a 3.29 geomean speedup and 60.7% energy savings for GC over the baseline 8-core out-of-order processor.N

    Design and Analysis of an APU for Exascale Computing

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    Abstract-The challenges to push computing to exaflop levels are difficult given desired targets for memory capacity, memory bandwidth, power efficiency, reliability, and cost. This paper presents a vision for an architecture that can be used to construct exascale systems. We describe a conceptual Exascale Node Architecture (ENA), which is the computational building block for an exascale supercomputer. The ENA consists of an Exascale Heterogeneous Processor (EHP) coupled with an advanced memory system. The EHP provides a high-performance accelerated processing unit (CPU+GPU), in-package high-bandwidth 3D memory, and aggressive use of die-stacking and chiplet technologies to meet the requirements for exascale computing in a balanced manner. We present initial experimental analysis to demonstrate the promise of our approach, and we discuss remaining open research challenges for the community
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