RF performance projections of graphene FETs vs. silicon MOSFETs

A graphene field-effect-transistor (GFET) model calibrated with extracted device parameters and a commercial 65 nm silicon MOSFET model are compared with respect to their radio frequency behavior. GFETs slightly lag behind CMOS in terms of speed despite their higher mobility. This is counterintuitive, but can be explained by the effect of a strongly nonlinear voltage-dependent gate capacitance. GFETs achieve their maximum performance only for narrow ranges of VDS and IDS, which must be carefully considered for circuit design. For our parameter set, GFETs require at least μ = 3000 cm2 V−1 s−1 to achieve the same performance as 65 nm silicon MOSFETs.Peer ReviewedPreprin

Residual Metallic Contamination of Transferred Chemical Vapor Deposited Graphene

Integration of graphene with Si microelectronics is very appealing by offering potentially a broad range of new functionalities. New materials to be integrated with Si platform must conform to stringent purity standards. Here, we investigate graphene layers grown on copper foils by chemical vapor deposition and transferred to silicon wafers by wet etch and electrochemical delamination methods with respect to residual sub-monolayer metallic contaminations. Regardless of the transfer method and associated cleaning scheme, time-of-flight secondary ion mass spectrometry and total reflection x-ray fluorescence measurements indicate that the graphene sheets are contaminated with residual metals (copper, iron) with a concentration exceeding 10$^{13}$ atoms/cm$^{2}$. These metal impurities appear to be partly mobile upon thermal treatment as shown by depth profiling and reduction of the minority charge carrier diffusion length in the silicon substrate. As residual metallic impurities can significantly alter electronic and electrochemical properties of graphene and can severely impede the process of integration with silicon microelectronics these results reveal that further progress in synthesis, handling, and cleaning of graphene is required on the way to its advanced electronic and optoelectronic applications.Comment: 26 pages, including supporting informatio

Precise percolation thresholds of two-dimensional random systems comprising overlapping ellipses

This work explores the percolation thresholds of continuum systems consisting of randomly-oriented overlapping ellipses. High-precision percolation thresholds for various homogeneous ellipse systems with different aspect ratios are obtained from extensive Monte Carlo simulations based on the incorporation of Vieillard-Baron's contact function of two identical ellipses with our efficient algorithm for continuum percolation. In addition, we generalize Vieillard-Baron's contact function from identical ellipses to unequal ellipses, and extend the Monte Carlo algorithm to heterogeneous ellipse systems where the ellipses have different dimensions and/or aspect ratios. Based on the concept of modified excluded area, a general law is verified for precise prediction of percolation threshold for many heterogeneous ellipse systems. In particular, the study of heterogeneous ellipse systems gains insight into the apparent percolation threshold symmetry observed earlier in systems comprising unequal circles (Consiglio et al., 2004).QC 20161011</p

Threshold of hierarchical percolating systems

Many modern nanostructured materials and doped polymers are morphologically too complex to be interpreted by classical percolation theory. Here, we develop the concept of a hierarchical percolating (percolation-within-percolation) system to describe such complex materials and illustrate how to generalize the conventional percolation to double-level percolation. Based on Monte Carlo simulations, we find that the double-level percolation threshold is close to, but definitely larger than, the product of the local percolation thresholds for the two enclosed single-level systems. The deviation may offer alternative insights into physics concerning infinite clusters and open up new research directions for percolation theor

Design and Characterization of High-Temperature ECL-Based Bipolar Integrated Circuits in 4H-SiC

Operation up to 300 degrees C of low-voltage 4H-SiC n-p-n bipolar transistors and digital integrated circuits based on emitter-coupled logic is demonstrated. Stable noise margins of about 1 V are reported for a two-input OR-NOR gate operated on - 15 V supply voltage from 27 degrees C up to 300 degrees C. In the same temperature range, an oscillation frequency of about 2 MHz is also reported for a three-stage ring oscillator.QC 20150624SSF HOTSi