54 research outputs found

    Yet Another SHA-3 Round 3 FPGA Results Paper

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    The NIST run SHA-3 competition is nearing completion. Currently in its final round, the five remaining competitors are still being examined in hardware, software and for security metrics in order to select a final winner. While there have been many area and speed results reported, one such metric that does not appear to be covered in very great detail is that of power and energy measurements on FPGA. This work attempts to add some new results to this section, namely, measured area, power, energy and iteration time results thereby giving NIST further metrics on which to base their selection decision

    An FPGA Technologies Area Examination of the SHA-3 Hash Candidate Implementations

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    This paper presents an examination of the different FPGA architectures used to implement the various hash function candidates for the currently ongoing NIST-organised SHA-3 competition~\cite{Sha3NIST}. This paper is meant to be used as both a quick reference guide used in conjunction with the results table~\cite{Sha3zoo} as an aid in finding the ”best-fit” FPGA for a particular algorithm, as well as a helpful guide for explaining the many different terms and measurement units used in the various FPGA packages

    Exploring temporal information in neonatal seizures using a dynamic time warping based SVM kernel

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    Seizure events in newborns change in frequency, morphology, and propagation. This contextual information is explored at the classifier level in the proposed patient-independent neonatal seizure detection system. The system is based on the combination of a static and a sequential SVM classifier. A Gaussian dynamic time warping based kernel is used in the sequential classifier. The system is validated on a large dataset of EEG recordings from 17 neonates. The obtained results show an increase in the detection rate at very low false detections per hour, particularly achieving a 12% improvement in the detection of short seizure events over the static RBF kernel based system

    Toward a personalized real-time diagnosis in neonatal seizure detection

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    The problem of creating a personalized seizure detection algorithm for newborns is tackled in this paper. A probabilistic framework for semi-supervised adaptation of a generic patient-independent neonatal seizure detector is proposed. A system that is based on a combination of patient-adaptive (generative) and patient-independent (discriminative) classifiers is designed and evaluated on a large database of unedited continuous multichannel neonatal EEG recordings of over 800 h in duration. It is shown that an improvement in the detection of neonatal seizures over the course of long EEG recordings is achievable with on-the-fly incorporation of patient-specific EEG characteristics. In the clinical setting, the employment of the developed system will maintain a seizure detection rate at 70% while halving the number of false detections per hour, from 0.4 to 0.2 FD/h. This is the first study to propose the use of online adaptation without clinical labels, to build a personalized diagnostic system for the detection of neonatal seizures

    Autonomous Satellite Recovery Vehicle

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    In collaboration with ERFSEDS, we would like to send a small satellite attached to a quad-copter as the payload for ERFSEDS rocket which will reach an altitude of 10,000 feet. The quad-copters objective will be to collect atmospheric data as it descends. Our plan is to 3-D print a new chassis for the quad-copters electronic components and arms that will allow the quad-copter to fold its arms inwards to meet the required space constraints. After launching the rocket, the satellite will be deployed at the target altitude and begin collecting data once jettisoned from the rocket. Once reaching 2,000 feet the quad-copter will be programmed to deploy a parachute. After reaching a safe velocity the arms will extend and autonomously navigate to a prearranged location. Flight planning will be done using the preexisting flight planning application. In addition to the critical components of the quad-copter, our design will integrate a number of other data collecting sub-systems currently being used in a weather balloon designed by the Society 4 S.P.A.C.E. team. These sensors will be able to collect pressure, temperature, humidity, wind, and video. This project will give us a better understanding of rocket propulsion systems and the effect of launch on the payload. It will also allow us to gain valuable research, data retrieval, team development and multi-club collaboration experience

    Distinguishing multiplications from squaring operations

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    Abstract. In this paper we present a new approach to attacking a modular exponentiation and scalar multiplication based by distinguishing multiplications from squaring operations using the instantaneous power consumption. Previous approaches have been able to distinguish these operations based on information of the specific implementation of the embedded algorithm or the relationship between specific plaintexts. The proposed attack exploits the expected Hamming weight of the result of the computed operations. We extrapolate our observations and assess the consequences for elliptic curve cryptosystems when unified formulae for point addition are used

    A Hardware Analysis of Twisted Edwards Curves for an Elliptic Curve Cryptosystem

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    This paper presents implementation results of a reconfigurable elliptic curve processor defined over prime fields GF(p)GF(p). We use this processor to compare a new algorithm for point addition and point doubling operations on the twisted Edwards curves, against a current standard algorithm in use, namely the Double-and-Add. Secure power analysis versions of both algorithms are also examined and compared. The algorithms are implemented on an FPGA, and the speed, area and power performance of each are then evaluated for various modes of circuit operation using parallel processing. To the authors\u27 knowledge, this work introduces the first documented FPGA implementation for computations on twisted Edwards curves over fields GF(p)GF(p)

    Neonatal EEG graded for severity of background abnormalities in hypoxic-ischaemic encephalopathy

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    This report describes a set of neonatal electroencephalogram (EEG) recordings graded according to the severity of abnormalities in the background pattern. The dataset consists of 169 hours of multichannel EEG from 53 neonates recorded in a neonatal intensive care unit. All neonates received a diagnosis of hypoxic-ischaemic encephalopathy (HIE), the most common cause of brain injury in full term infants. For each neonate, multiple 1-hour epochs of good quality EEG were selected and then graded for background abnormalities. The grading system assesses EEG attributes such as amplitude and frequency, continuity, sleep--wake cycling, symmetry and synchrony, and abnormal waveforms. Background severity was then categorised into 4 grades: normal or mildly abnormal EEG, moderately abnormal EEG, severely abnormal EEG, and inactive EEG. The data can be used as a reference set of multi-channel EEG for neonates with HIE, for EEG training purposes, or for developing and evaluating automated grading algorithms

    All-or-Nothing Transforms as a Countermeasure to Differential Side-Channel Analysis

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    All-or-Nothing Encryption was introduced by Rivest as a countermeasure to brute force key search attacks. This work identifies a new application for All-or-Nothing Transforms, as a protocol-level countermeasure to Differential Side-Channel Analysis (DSCA). We describe an extension to the All-or-Nothing protocol, that strengthens the DCSA resistance of the cryptosystem. The resultant scheme is a practical alternative to Boolean and arithmetic masking, used to protect implementations of encryption and decryption operations on electronic devices

    FPGA Implementations of SHA-3 Candidates:CubeHash, Grøstl, L{\sc ane}, Shabal and Spectral Hash

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    Abstract: Hash functions are widely used in, and form an important part of many cryptographic protocols. Currently, a public competition is underway to find a new hash algorithm(s) for inclusion in the NIST Secure Hash Standard (SHA-3). Computational efficiency of the algorithms in hardware will form one of the evaluation criteria. In this paper, we focus on five of these candidate algorithms, namely CubeHash, Grøstl, L{\sc ane}, Shabal and Spectral Hash. Using Xilinx Spartan-3 and Virtex-5 FPGAs, we present architectures for each of these hash functions, and explore area-speed trade-offs in each design. The efficiency of various architectures for the five hash functions is compared in terms of throughput per unit area. To the best of the authors\u27 knowledge, this is the first such comparison of these SHA-3 candidates in the literature
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