Experimental verification of memristor-based material implication NAND operation

Memristors are being considered as promising devices for highly dense memory systems as well as the potential basis of new computational paradigms. In this scenario, and in relation with data processing, one of the more specific and differential logic functions is the material implication logic also named as IMPLY logic. Many papers have been published in this framework but few of them are related with experimental works using real memristor devices. In the paper authors show the verification of the IMPLY function by using Ni/HfO2/Si manufactured devices and laboratory measurements. The proper behavior of the IMPLY structure (2 memristors) has been shown. The paper also verifies the proper operation of a two-step IMPLY-based NAND gate implementation, showing the electrical behavior of the circuit in a cycling operation. A new procedure to implement a NAND gate that requires only one step is experimentally shown as well

Self-organizing neural networks based on OxRAM devices under a fully unsupervised training scheme

A fully-unsupervised learning algorithm for reaching self-organization in neuromorphic architectures is provided in this work. We experimentally demonstrate spike-timing dependent plasticity (STDP) in Oxide-based Resistive Random Access Memory (OxRAM) devices, and propose a set of waveforms in order to induce symmetric conductivity changes. An empirical model is used to describe the observed plasticity. A neuromorphic system based on the tested devices is simulated, where the developed learning algorithm is tested, involving STDP as the local learning rule. The design of the system and learning scheme permits to concatenate multiple neuromorphic layers, where autonomous hierarchical computing can be performed

Non-homogeneuos conduction of conductive filaments in Ni/HfO2/Si resistive switching structures observed with CAFM

Altres ajuts: ERDF/TEC2011-2792-C02-02Conductive filaments (CFs) in Ni/HfO₂/Si resistive switching structures are analysed at the nanoscale by means of Conductive Atomic Force Microscopy (CAFM). Differences in the CF conductivity are measured depending on the resistive state of the device. Moreover, for both resistance states, non-homogeneous conduction across the CF area is observed, in agreement with a tree-shaped CF

Experimental verification of memristor-based material implication NAND operation

Memristors are being considered as promising devices for highly dense memory systems as well as the potential basis of new computational paradigms. In this scenario, and in relation with data processing, one of the more specific and differential logic functions is the material implication logic also named as IMPLY logic. Many papers have been published in this framework but few of them are related with experimental works using real memristor devices. In the paper authors show the verification of the IMPLY function by using $\mathrm{Ni}/\mathrm{HfO}_{2}/\mathrm{Si}$ manufactured devices and laboratory measurements. The proper behavior of the IMPLY structure (2 memristors) has been shown. The paper also verifies the proper operation of a two-steps IMPLY-based NAND gate implementation, showing the electrical behavior of the circuit in a cycling operation. A new procedure to implement a NAND gate that requires only one step is experimentally shown as well.Postprint (author's final draft

2020 IEEE Latin America Electron Devices Conference (LAEDC)

Producción CientíficaThree topologies of TiN/Ti/HfO 2 /W resistive switching memories (RRAM) are proposed in this work: crossbar, isolated and isolated-crossbar configurations. All configurations use the same sequence of technological processes. The different topologies are obtained by customizing the layouts corresponding to the bottom electrode (W), and the silicon oxide layer that is deposited on the bottom electrode. A comparative study of the resistive switching mechanisms in the three configurations has been carried out. DC current-voltage cycles and small signal conductance memory maps of single RRAM show relevant differences among the three topologies. Complex structures containing various devices (series, anti-series, parallel, antiparallel) have also been fabricated. Switching loops and memory maps obtained for these complex structures demonstrate that they are fully operative, validating the technological route to manufacture complete RRAM memory chips.Ministerio de Economía, Industria y Competitividad - Fondo Europeo de Desarrollo Regional (grants TEC2017-84321- C4-1-R and TEC2017-84321-C4-2-R

New high resolution random telegraph noise (RTN) characterization method for resistive RAM

Random Telegraph Noise (RTN) is one of the main reliability problems of resistive switching-based memories. To understand the physics behind RTN, a complete and accurate RTN characterization is required. The standard equipment used to analyse RTN has a typical time resolution of ∼2 ms which prevents evaluating fast phenomena. In this work, a new RTN measurement procedure, which increases the measurement time resolution to 2 μs, is proposed. The experimental set-up, together with the recently proposed Weighted Time Lag (W-LT) method for the analysis of RTN signals, allows obtaining a more detailed and precise information about the RTN phenomenon

Analysis of set and reset mechanisms in Ni/HfO2-based RRAM with fast ramped voltages

The resistive switching phenomenon is analyzed using a purposely developed setup which allows fast ramped voltages and measurements in the time domain.Taking advantage of these capabilities, the Set and Reset processes in Ni/HfO2 structures have been studied for a large range of voltage ramp speeds. The results obtained show that Set and Reset voltages increase with voltage ramp speed. The use of time domain measurements has allowed concluding that a critical energy is needed to trigger the Set and Reset processes, independently of the biasing condition

Analysis of the Resistive Switching phenomenon in MOS devices for memory and logic applications

En general, la continua evolución de la tecnología ha llevado a afrontar nuevos retos emergentes. En cuanto al campo de la electrónica, uno de los más relevantes ha sido la ley de Moore que postula que "el número de transistores en un circuito integrado se duplica aproximadamente cada dos años". Para cumplir esta ley, la solución ha sido reducir las dimensiones de los dispositivos. Sin embargo, en las últimas décadas se han alcanzado limitaciones físicas debido a que la disminución de las dimensiones está alcanzando el rango atómico. Se han observado además problemas debidos al escalamiento del dispositivo tales como efectos de canal corto en MOSFET. Por ello, la comunidad científica se ha centrado en la exploración de nuevos materiales, alternativas estructuras de dispositivo o diferentes fenómenos que superen los diferentes problemas debidos l escalado. En cuanto a los fenómenos alternativos, uno de los más relevantes ha sido el fenómeno de Resistive Switching (RS) que ha mostrado características prometedoras para ser implementado en muchas aplicaciones. Este fenómeno se basa en la capacidad de una capa dieléctrica para cambiar su resistencia (o conductividad) entre dos o más valores, que muestran un comportamiento no volátil, bajo la acción de un campo eléctrico. Estas características hacen que este fenómeno sea muy prometedor para su aplicación en: lógica digital, donde surge un nuevo paradigma de computación basado en este fenómeno; en el desarrollo de redes neuronales artificiales, que emulan el comportamiento de la parte neuronal conocida como sinapsis o memoria como la próxima generación de memorias no volátiles. Sin embargo, a pesar de los grandes esfuerzos de la comunidad científica en la última mitad de siglo, hay varios temas candentes, tales como la comprensión profunda de RS, el análisis de los problemas de fiabilidad que afectan el comportamiento de RS o la investigación sobre nuevas aplicaciones de dispositivos basados ​​en RS, en los que queda mucho trabajo por hacer. Por lo tanto, en esta tesis, se ha estudiado el fenómeno RS tanto a nivel de dispositivo, para analizar el fenómeno en sí mismo, como a nivel de circuito, para analizar su aplicación como memorias y en operaciones digitales. Inicialmente, el fenómeno se ha estudiado experimentalmente en transistores MOSFET analizando el efecto de la polaridad de tensión aplicada para provocar RS sobre el cambio de resistencia dieléctrica. Además, debido al carácter localizado del fenómeno, se han analizado las diferentes contribuciones involucradas en la conducción a través del dieléctrico y la posibilidad de controlar la localización de dichas contribuciones. A continuación, se ha estudiado RS en memristores con una capa dieléctrica basada en HfO2. Concretamente, se ha estudiado el fenómeno aplicando rampas de tensión rápidas para provocar los cambios de resistencia con el fin de analizar la influencia de la velocidad de rampa de tensión en los parámetros RS. Además, se han propuesto sistemas experimentales y métodos de caracterización mejorados para analizar el random telegraph noise (RTN) asociado a RS. Después, se han investigado los memristores con una capa dieléctrica basada en SiO como dispositivos de memoria y selección realizando diferentes análisis DC y AC para corroborar la viabilidad de tales dispositivos para esas aplicaciones. Finalmente, se han estudiado los memristores como el elemento principal para diseñar puertas lógicas, específicamente, para implementar las puertas lógicas IMPLY y NAND. Se ha llevado a cabo la demostración experimental del funcionamiento de ambas puertas lógicas así como el estudio experimental del comportamiento transitorio de los memristores implicados en la puerta IMPLY con el fin de analizar que sucede durante la operación lógica.In general, the continuous evolution, and improvement, of the technology has led to face new emerging challenges. Regarding the electronic field, one of the most relevant has been the Moore’s law which postulates “the number of transistors in a dense integrated circuit doubles approximately every two years”. To accomplish this postulate, the solution has been reducing the device dimensions. However, in last decades, physical limitations have been reached since device dimensions are in the atomic range. Moreover, problems originated from the device scaling such as short channel effects in MOSFETs have been observed. Consequently, the focus of the scientific community has turned into the exploration of alternative device materials and structures or different phenomena that would overcome the different issues owing to the scaling. Concerning alternative phenomena, one of the most relevant has been the Resistive Switching (RS) phenomenon which has shown promising features to be implemented in many applications. This phenomenon is based on the capability of a dielectric layer to change its resistance (or conductivity) between two or more values, which show a non-volatile behavior, under the action of an electric field. Overall, these characteristics makes this phenomenon very suitable and promising for its application in digital logic where a new paradigm of computation based on this phenomenon is emerging, in the development of artificial neural networks emulating the behavior of the neuron part known as synapse, and in memory like the next generation of non-volatile memories. However, despite the great efforts of the scientific community in last half a century, there are several hot topics such as the deeper RS understanding, the analysis of reliability issues affecting RS behavior or the investigation on new applications of RS based devices in which much more work must be done. In this way, the goal of this thesis has been focused on increasing the RS phenomenon knowledge and studying its feasibility for different applications. Hence, RS phenomenon has been study both at device level, to analyze the phenomenon itself, and at circuit level, to analyze its application in memory and digital fields. Initially, the phenomenon has been experimentally studied on MOSFET transistors analyzing the effect on the dielectric resistance change of the voltage polarity applied to provoke RS. Furthermore, due to the localized character of the phenomenon, the different current contributions involved in the conduction through the dielectric and the control of those current contributions have been analyzed. Then, RS has been studied on memristors with a dielectric layer based on HfO2. Here, the phenomenon has been studied applying fast voltage ramps to provoke the resistance changes to analyze the influence of the voltage ramp speed on the RS parameters. In addition, enhanced experimental setups and characterization methods have been proposed to analyze the RTN associated to RS. In addition, memristors with a SiO-based dielectric layer have been investigated as memory and selector devices by performing different DC and pulsed analysis to corroborate the feasibility of such devices for these applications. Finally, the application of memristors in digital field have been performed. Memristors have been used as the main element to design logic gates, specifically, to implement material implication-based (IMPLY) and NAND gates. Then, the experimental demonstration of both memristor-based logic gates (IMPLY and NAND) performance has been carried out. In addition, the transient behavior of memristors involved in the IMPLY gate have been experimentally studied in order to analyze what happens to memristors during the operation

Analysis of the resistive switching phenomenon in MOS devices for memory and logic applications

Premi Extraordinari de Doctorat concedit pels programes de doctorat de la UAB per curs acadèmic 2016-2017En general, la continua evolución de la tecnología ha llevado a afrontar nuevos retos emergentes. En cuanto al campo de la electrónica, uno de los más relevantes ha sido la ley de Moore que postula que "el número de transistores en un circuito integrado se duplica aproximadamente cada dos años". Para cumplir esta ley, la solución ha sido reducir las dimensiones de los dispositivos. Sin embargo, en las últimas décadas se han alcanzado limitaciones físicas debido a que la disminución de las dimensiones está alcanzando el rango atómico. Se han observado además problemas debidos al escalamiento del dispositivo tales como efectos de canal corto en MOSFET. Por ello, la comunidad científica se ha centrado en la exploración de nuevos materiales, alternativas estructuras de dispositivo o diferentes fenómenos que superen los diferentes problemas debidos l escalado. En cuanto a los fenómenos alternativos, uno de los más relevantes ha sido el fenómeno de Resistive Switching (RS) que ha mostrado características prometedoras para ser implementado en muchas aplicaciones. Este fenómeno se basa en la capacidad de una capa dieléctrica para cambiar su resistencia (o conductividad) entre dos o más valores, que muestran un comportamiento no volátil, bajo la acción de un campo eléctrico. Estas características hacen que este fenómeno sea muy prometedor para su aplicación en: lógica digital, donde surge un nuevo paradigma de computación basado en este fenómeno; en el desarrollo de redes neuronales artificiales, que emulan el comportamiento de la parte neuronal conocida como sinapsis o memoria como la próxima generación de memorias no volátiles. Sin embargo, a pesar de los grandes esfuerzos de la comunidad científica en la última mitad de siglo, hay varios temas candentes, tales como la comprensión profunda de RS, el análisis de los problemas de fiabilidad que afectan el comportamiento de RS o la investigación sobre nuevas aplicaciones de dispositivos basados ​​en RS, en los que queda mucho trabajo por hacer. Por lo tanto, en esta tesis, se ha estudiado el fenómeno RS tanto a nivel de dispositivo, para analizar el fenómeno en sí mismo, como a nivel de circuito, para analizar su aplicación como memorias y en operaciones digitales. Inicialmente, el fenómeno se ha estudiado experimentalmente en transistores MOSFET analizando el efecto de la polaridad de tensión aplicada para provocar RS sobre el cambio de resistencia dieléctrica. Además, debido al carácter localizado del fenómeno, se han analizado las diferentes contribuciones involucradas en la conducción a través del dieléctrico y la posibilidad de controlar la localización de dichas contribuciones. A continuación, se ha estudiado RS en memristores con una capa dieléctrica basada en HfO2. Concretamente, se ha estudiado el fenómeno aplicando rampas de tensión rápidas para provocar los cambios de resistencia con el fin de analizar la influencia de la velocidad de rampa de tensión en los parámetros RS. Además, se han propuesto sistemas experimentales y métodos de caracterización mejorados para analizar el random telegraph noise (RTN) asociado a RS. Después, se han investigado los memristores con una capa dieléctrica basada en SiO como dispositivos de memoria y selección realizando diferentes análisis DC y AC para corroborar la viabilidad de tales dispositivos para esas aplicaciones. Finalmente, se han estudiado los memristores como el elemento principal para diseñar puertas lógicas, específicamente, para implementar las puertas lógicas IMPLY y NAND. Se ha llevado a cabo la demostración experimental del funcionamiento de ambas puertas lógicas así como el estudio experimental del comportamiento transitorio de los memristores implicados en la puerta IMPLY con el fin de analizar que sucede durante la operación lógica.In general, the continuous evolution, and improvement, of the technology has led to face new emerging challenges. Regarding the electronic field, one of the most relevant has been the Moore's law which postulates "the number of transistors in a dense integrated circuit doubles approximately every two years". To accomplish this postulate, the solution has been reducing the device dimensions. However, in last decades, physical limitations have been reached since device dimensions are in the atomic range. Moreover, problems originated from the device scaling such as short channel effects in MOSFETs have been observed. Consequently, the focus of the scientific community has turned into the exploration of alternative device materials and structures or different phenomena that would overcome the different issues owing to the scaling. Concerning alternative phenomena, one of the most relevant has been the Resistive Switching (RS) phenomenon which has shown promising features to be implemented in many applications. This phenomenon is based on the capability of a dielectric layer to change its resistance (or conductivity) between two or more values, which show a non-volatile behavior, under the action of an electric field. Overall, these characteristics makes this phenomenon very suitable and promising for its application in digital logic where a new paradigm of computation based on this phenomenon is emerging, in the development of artificial neural networks emulating the behavior of the neuron part known as synapse, and in memory like the next generation of non-volatile memories. However, despite the great efforts of the scientific community in last half a century, there are several hot topics such as the deeper RS understanding, the analysis of reliability issues affecting RS behavior or the investigation on new applications of RS based devices in which much more work must be done. In this way, the goal of this thesis has been focused on increasing the RS phenomenon knowledge and studying its feasibility for different applications. Hence, RS phenomenon has been study both at device level, to analyze the phenomenon itself, and at circuit level, to analyze its application in memory and digital fields. Initially, the phenomenon has been experimentally studied on MOSFET transistors analyzing the effect on the dielectric resistance change of the voltage polarity applied to provoke RS. Furthermore, due to the localized character of the phenomenon, the different current contributions involved in the conduction through the dielectric and the control of those current contributions have been analyzed. Then, RS has been studied on memristors with a dielectric layer based on HfO2. Here, the phenomenon has been studied applying fast voltage ramps to provoke the resistance changes to analyze the influence of the voltage ramp speed on the RS parameters. In addition, enhanced experimental setups and characterization methods have been proposed to analyze the RTN associated to RS. In addition, memristors with a SiO-based dielectric layer have been investigated as memory and selector devices by performing different DC and pulsed analysis to corroborate the feasibility of such devices for these applications. Finally, the application of memristors in digital field have been performed. Memristors have been used as the main element to design logic gates, specifically, to implement material implication-based (IMPLY) and NAND gates. Then, the experimental demonstration of both memristor-based logic gates (IMPLY and NAND) performance has been carried out. In addition, the transient behavior of memristors involved in the IMPLY gate have been experimentally studied in order to analyze what happens to memristors during the operation