22 research outputs found

    Combined x-ray imaging and diffraction study of light-induced distortions in Fe:LiNbO3

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    A real-time investigation of the light-induced deformation on Fe:LiNbO3 crystals was performed by taking advantage of both the high flux and the detector system (FRELON CCD camera) available at a modern synchrotron radiation source like the ESRF. The observed contrast and effective misorientation after illumination of a Z-cut crystal are mainly due to (00l) lattice planes tilts. Considering the coupling of the bulk photovoltaic field and the converse piezoelectric effect, we develop a 'parallel plate condenser'-like macroscopic model of the distortion generated by the visible light beam. Calculation of the effective misorientation at the edges of the illuminated region gives values of the order of ±20 arcsec which are consistent with our experimental data. © 2001 IOP Publishing Ltd

    Retrieving overlapping crystals information from TEM nano-beam electron diffraction patterns

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    International audienceThe diffraction patterns acquired with a transmission electron microscope (TEM) contain Bragg reflections related to all the crystals superimposed in the thin foil and crossed by the electron beam. Regarding TEM-based orientation and phase characterisation techniques, the nondissociation of these signals is usually considered as the main limitation for the indexation of diffraction patterns. A new method to identify the information related to the distinct but overlapped grains is presented. It consists in subtracting the signature of the dominant crystal before reindexing the diffraction pattern. The method is coupled to the template matching algorithm used in a standard automated crystal orientation mapping tool (ACOM-TEM). The capabilities of the approach are illustrated with the characterisation of a NiSi thin film stacked on a monocrystalline Si layer. Then, a subtracting-indexing cycle applied to a 70 nm thick thin foil containing polycrystalline tungsten electrical contacts shows the capability of the technique to recognise small nondominant grains

    TEM illumination settings study for optimum spatial resolution and indexing reliability in crystal orientation mappings

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    International audienceThe spatial resolution and the indexing quality obtained with an automated orientation and phase mapping tool are analyzed for different Transmission Electron Microscope (TEM) illumination settings. The electron probe size and convergence angle are studied for two TEM configuration modes referred as microprobe and nanoprobe modes. Using a 10 mu m C-2 aperture in a FEI Tecnai F20 (S)TEM, the nanoprobe mode is used to get a small convergent electron beam while the microprobe mode provides a nearly parallel illumination at the cost of a larger probe size. The nanoprobe configuration enables to increase the spatial resolution (similar to 1 nm vs 3 nm) but also affects the fraction of mis-indexed points (15% vs 1%). Indexing errors are attributed to the increase by a factor of three of the convergence angle with respect to the microprobe mode. While intermediate optimum settings may be found and are potentially achievable on electron microscopes providing a `free lens' control or a larger choice of C-2 apertures, it is emphasized that the spatial resolution cannot be considered without reference to the indexing quality and, consequently to the convergence angle. (C) 2016 Elsevier Ltd. All rights reserved

    Atom probe tomography of SRAM transistors: Specimen preparation methods and analysis

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    Different FIB-based sample preparation methods for atom probe analysis of transistors have been proposed and discussed. A special procedure, involving device deprocessing, has been used to analyze by APT a sub-30 nm transistor extracted from a SRAM device. The analysis provides three dimensional compositions of Ni-silicide contact, metal gate and high-k oxide of the transistor gate. © 2013 Elsevier B.V. All rights reserved

    Electromigration Behavior of 3D-IC TSV

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    Resistance Increase Due to Electromigration Induced Depletion Under TSV

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    ISBN 978-1-4244-9111-7International audience3D-IC integration using Through Silicon Via (TSV) is becoming an alternative to overcome obstacles of CMOS scaling. As TSV processes reach maturity, reliability investigation becomes critical. To the best of our knowledge, we propose for the first time an analytical model of resistance increase due to electromigration induced voiding in a line ended by a TSV

    Kinetic Monte Carlo simulations of Ge–Sb–Te thin film crystallization

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    International audienceAbstract Simulation of atomic redistribution in Ge–Sb–Te (GST)-based memory cells during SET/RESET cycling is needed in order to understand GST memory cell failure and to design improved non-volatile memories. However, this type of atomic scale simulations is extremely challenging. In this work, we propose to use a simplified GST system in order to catch the basics of atomic redistribution in Ge-rich GST (GrGST) films using atomistic kinetic Monte Carlo simulations. Comparison between experiments and simulations shows good agreements regarding the influence of Ge excess on GrGST crystallization, as well as concerning the GST growth kinetic in GrGST films, suggesting the crystallized GST ternary compound to be off-stoichiometric. According to the simulation of atomic redistribution in GrGST films during SET/RESET cycling, the film microstructure stabilized during cycling is significantly dependent of the GST ternary phase stoichiometry. The use of amorphous layers exhibiting the GST ternary phase stoichiometry placed at the bottom or at the top of the GrGST layer is shown to be a way of controlling the microstructure evolution of the film during cycling. The significant evolution of the local composition in the amorphous solution during cycling suggests a non-negligible variation of the crystallization temperature with operation time

    Reliability of TSV interconnects: Electromigration, thermal cycling, and impact on above metal level dielectric

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    International audienceIn this paper, reliability of Through Silicon via (TSV) interconnects is analyzed for two technologies. First part presents an exhaustive analysis of Cu TSV-last approach of 2 μm diameter and 15 μm of depth. Thermal cycling and electromigration stresses are performed on dedicated devices. Thermal cycling is revealed to induce only defects on non-mature processes. Electromigration induces voids in adjacent metal level, right at TSV interface. Moreover, the expected lifetime benefit by increasing line thickness does not occur due to increasing dispersion of voiding mechanism. Second part covers reliability of Cu TSV-middle technology, of 10 μm diameter and 80 μm depth, with thermal cycling, BEoL dielectric breakdown, and electromigration study. Thermal cycling is assessed on two designs: isolated and dense TSV patterns. Dielectric breakdown tests underline an impact of TSV on the reliability of metal level dielectrics right above TSV. Electromigration reveal similar degradation mechanism and kinetic as on TSV-last approach
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