The size and shape of the oblong dwarf planet Haumea

We use thermal radiometry and visible photometry to constrain the size, shape, and albedo of the large Kuiper belt object Haumea. The correlation between the visible and thermal photometry demonstrates that Haumea's high amplitude and quickly varying optical light curve is indeed due to Haumea's extreme shape, rather than large scale albedo variations. However, the well-sampled high precision visible data we present does require longitudinal surface heterogeneity to account for the shape of lightcurve. The thermal emission from Haumea is consistent with the expected Jacobi ellipsoid shape of a rapidly rotating body in hydrostatic equilibrium. The best Jacobi ellipsoid fit to the visible photometry implies a triaxial ellipsoid with axes of length 1920 x 1540 x 990 km and density 2.6 g cm^-3$, as found by Lellouch et al(2010). While the thermal and visible data cannot uniquely constrain the full non-spherical shape of Haumea, the match between the predicted and measured thermal flux for a dense Jacobi ellipsoid suggests that Haumea is indeed one of the densest objects in the Kuiper belt.Comment: 21 pages, 2 figures, 2 tables -- Accepted for publication in Earth, Moon and Planet

RAD Module Infrastructure of the Field-programmable Port eXtender (FPX) Version 2.0

The Field-programmable Port eXtender (FPX) provides dynamic, fast, and flexible mechanisms to process data streams at the ports of the Washington University Gigabit Switch (WUGS-20). In order to facilitate the design and implementation of portable hardware modules for the Reprogrammable Application Device (RAD) on the FPX board, infrastructure components have been developed. These components abstract application module designers from device-specific timing specifications of off-chip memory devices, as well as processing system-level control cells. This document describes the design and internal functionality of the infrastructure components and is intended as a reference for future component revisions and additions. Application module designers should refer to the Generalized RAD Module Interface Specification of the Field Programmable Port Extender (FPX), EUCS-TM-01-15

Generalized RAD Module Interface Specification of the Field-programmable Port eXtender (FPX) Version 2.0

The Field-programmable Port eXtender (FPX) provides dynamic, fast, and flexible mechanisms to process data streams at the ports of the Washington University Gigabit Switch (WUGS-20). By performing all computations in FPGA hardware, cells and packets can be processed at the full line speed of the transmission interface, currently 2.4 Gbits/sec. In order to design and implement portable hardware modules for the Reprogrammable Application Devide (RAD) on the FPX board, all modules should conform to a standard interface. This standard interface specifies how modules receive and transmit ATM cells of data flows, prevent data loss during reconfiguration, and access off-chip memory. Module designers should conform to the standard I/O signal names and take special note of timing diagram references

Scalable IP Lookup for Programmable Routers

Continuing growth in optical link speeds places increasing demands on the performance of Internet routers, while deployment of embedded and distributed network services imposes new demands for flexibility and programmability. IP adress lookup has become a significant performance bottleneck for the highest performance routers. New commercial products utilize dedicated Content Addressable Memory (CAM) devides to achieve high lookup speeds. This paper describes an efficient, scalable lookup engine design, able to achieve high-performance with the use of a small portion of a reconfigurable logic device and a commodity Random Access Memory (RAM) device. Based on Eatherton\u27s Tree Bitmap algorithm [1] the Fast Internet Protocol Lookup (FIPL) engine can be scaled to achieve over 9 million lookups per second at the fairly modest clock speed of 100 MHz. FIPL\u27s scalability, efficiency, and favorable update performance make it an ideal candidate for System-On-a-Chip (SOC) solutions for programmable router port processors