119 research outputs found

    Charge transport and trapping in Cs-doped poly(dialkoxy-p-phenylene vinylene) light-emitting diodes

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    Al/Cs/MDMO-PPV/ITO (where MDMO-PPV stands for poly[2-methoxy-5-(3'-7'-dimethyloctyloxy)-1,4phenylene vinylene] and ITO is indium tin oxide) light-emitting diode (LED) structures, made by physical vapor deposition of Cs on the emissive polymer layer, have been characterized by electroluminescence, current-voltage, and admittance spectroscopy. Deposition of Cs is found to improve the balance between electron and hole currents, enhancing the external electroluminescence efficiency from 0.01 cd A-1 for the bare Al cathode to a maximum of 1.3 cd A-1 for a Cs coverage of only 1.5Ă—1014 atoms/cm2. By combining I-V and admittance spectra with model calculations, in which Cs diffusion profiles are explicitly taken into account, this effect could be attributed to a potential drop at the cathode interface due to a Cs-induced electron donor level 0.61 eV below the lowest unoccupied molecular orbital. In addition, the admittance spectra in the hole-dominated regime are shown to result from space-charge-limited conduction combined with charge relaxation in trap levels. This description allows us to directly determine the carrier mobility, even in the presence of traps. In contrast to recent literature, we demonstrate that there is no need to include dispersive transport in the description of the carrier mobility to explain the excess capacitance that is typically observed in admittance spectra of p-conjugated materials

    Representational predicaments for employees: Their impact on perceptions of supervisors\u27 individualized consideration and on employee job satisfaction

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    A representational predicament for a subordinate vis-à-vis his or her immediate superior involves perceptual incongruence with the superior about the subordinate\u27s work or work context, with unfavourable implications for the employee. An instrument to measure the incidence of two types of representational predicament, being neglected and negative slanting, was developed and then validated through an initial survey of 327 employees. A subsequent substantive survey with a fresh sample of 330 employees largely supported a conceptual model linking being neglected and negative slanting to perceptions of low individualized consideration by superiors and to low overall job satisfaction. The respondents in both surveys were all Hong Kong Chinese. Two case examples drawn from qualitative interviews illustrate and support the conceptual model. Based on the research findings, we recommend some practical exercises to use in training interventions with leaders and subordinates. © 2013 Copyright Taylor and Francis Group, LLC

    Advantages of the New Generation Quasi-Monolithic Integration Technology (QMIT)

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    Fabrication process and advantages of the new generation quasi-monolithic integration technology are presented. The novel fabrication process gives excellent advantages such as extremely low thermal resistance, and a much lower thermal stress than the earlier QMIT concept [1]. This highly improves the packaging lifetime and electrical characteristics of the active devices. The fabrication process is simple and compatible with fabrication of high-Q passive elements. In comparison to the old concept of QMIT, elimination of air-bridges in this technology not only reduces the parasitics but also enables the fabrication of the rest of the circuit after measuring the microwave characteristics of the embedded active devices. This makes very accurate microwave and millimetrewave designs possible. Using the new fabrication process, microwave and millimetrewave circuits (with both coplanar and microstrip lines) containing power devices have for the first time been realised

    Quasi-Monolithic integration technology (QMIT) for power applications

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    In this paper, we address the most important issues related to realisation of µ-wave and mm-wave circuits containing power devices in the novel technology of Quasi-Monolithic Integration Technology (QMIT). A finite element simulator (2D and 3D), a scanning probe microscopy (SPM), a nanometer surface profiler (DEKTAK) and a Peltier element (PE) have been used to optimise the standard structure of QMIT with respect to these issues and limitations in fabrication process. The first important issue is the thermal resistance of QMIT structure. Using a 2D finite element method, the effects of the most important parameters on thermal resistance such as the distance between active device and substrate (W), the thermal conductivity of glue (kepoxy) and use of a heat spreader to decrease thermal resistance have been investigated in detail. The second important issue is the induced thermal stress in QMIT structure which results from differences in thermal expansion coefficient of materials involved. A 3D finite element simulator, a scanning probe microscopy (SPM) measurements and a nanometer surface profiler (DEKTAK) accompanied with a Peltier element (PE) have been used to simulate and measure the thermal stress distribution in QMIT standard structure. Then, the effect of the most important parameters such as W, baking temperature of epoxy and material properties of epoxy have been described in detail

    Improvements of Thermal Resistance and Thermal Stress in Quasi-Monolithic Integration Technology (QMIT) with a New Fabrication Process

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    Static heat transfer and thermal stress analysis for the new generation quasi-monolithic integration technology (NGQMIT) is presented using a three-dimensional finite element simulator. Effects of different factors and parameters such as the gap between the silicon sidewalls and GaAs-chip (Wg), temperature dependent materials properties, isotropic material properties and backside gold metallization thickness or diamond-filled polyimide are described. It is shown that thermal resistances of 11 °C/W and 8.5 °C/W are possible using 200 µm electroplated gold heat-spreader and diamond-filled polyimide on the backside of the active device, respectively. This promises successful realization of the high frequency circuits containing power active devices using the novel QMIT. In comparison to the earlier fabrication process [1-2], eight times improvement in thermal stress is achieved. This extremely improves lifetime of the packaging. The results of thermal stress simulation are compared with white-light interferomety measurement
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