Static heat transfer and thermal stress analysis for the new generation quasi-monolithic integration technology (NGQMIT) is presented using a three-dimensional finite element simulator. Effects of different factors and parameters such as the gap between the silicon sidewalls and GaAs-chip (Wg), temperature dependent materials properties, isotropic material properties and backside gold metallization thickness or diamond-filled polyimide are described. It is shown that thermal resistances of 11 °C/W and 8.5 °C/W are possible using 200 µm electroplated gold heat-spreader and diamond-filled polyimide on the backside of the active device, respectively. This promises successful realization of the high frequency circuits containing power active devices using the novel QMIT. In comparison to the earlier fabrication process [1-2], eight times improvement in thermal stress is achieved. This extremely improves lifetime of the packaging. The results of thermal stress simulation are compared with white-light interferomety measurement
