411 research outputs found
Parallel image compression
A parallel compression algorithm for the 16,384 processor MPP machine was developed. The serial version of the algorithm can be viewed as a combination of on-line dynamic lossless test compression techniques (which employ simple learning strategies) and vector quantization. These concepts are described. How these concepts are combined to form a new strategy for performing dynamic on-line lossy compression is discussed. Finally, the implementation of this algorithm in a massively parallel fashion on the MPP is discussed
Experimental Progress in Computation by Self-Assembly of DNA Tilings
Approaches to DNA-based computing by self-assembly require the
use of D. T A nanostructures, called tiles, that have efficient chemistries, expressive
computational power: and convenient input and output (I/O) mechanisms.
We have designed two new classes of DNA tiles: TAO and TAE, both
of which contain three double-helices linked by strand exchange. Structural
analysis of a TAO molecule has shown that the molecule assembles efficiently
from its four component strands. Here we demonstrate a novel method for
I/O whereby multiple tiles assemble around a single-stranded (input) scaffold
strand. Computation by tiling theoretically results in the formation of structures
that contain single-stranded (output) reported strands, which can then
be isolated for subsequent steps of computation if necessary. We illustrate the
advantages of TAO and TAE designs by detailing two examples of massively
parallel arithmetic: construction of complete XOR and addition tables by linear
assemblies of DNA tiles. The three helix structures provide flexibility for
topological routing of strands in the computation: allowing the implementation
of string tile models
Efficient VLSI fault simulation
AbstractLet C be an acyclic Boolean circuit with n gates and ≤ n inputs. A circuit manufacture error may result in a “Stuck-at” (S-A) fault in a circuit identical to C except a gate v only outputs a fixed Boolean value. The S-A fault simulation problem for C is to determine all possible (S-A) faults which can be detected (i.e., faults circuit and C would give distinct outputs) by a given test pattern input.We consider the case where C is a tree (i.e., has fan-out 1.)We give a practical algorithm for fault simulation which simultaneously determines all detectable S-A faults for every gate in the circuit tree C. Our algorithm required only the evaluation of a circuit FS(C) which has ≤ 7n gates and has depth ≤ 3(d + 1), when d is the depth of C. Thus the sequential time of our algorithm is ≤ 7n, and the parallel time is ≤ 3(d + 1). Furthermore, FS(C) requires only a small constant factor more VLSI area than does the original circuit C.We also extend our results to get efficient methods for fault simulation of oblivious VLSI circuits with feedback lines
An efficient output-sensitive hidden surface removal algorithm and its parallelization
In this paper we present an algorithm for hidden surface removal for a class of polyhedral surfaces which have a property that they can be ordered relatively quickly like the terrain maps. A distinguishing feature of this algorithm is that its running time is sensitive to the actual size of the visible image rather than the total number of intersections in the image plane which can be much larger than the visible image. The time complexity of this algorithm is O((k +nflognloglogn) where n and k are respectively the input and the output sizes. Thus, in a significant number of situations this will be faster than the worst case optimal algorithms which have running time Ω(n 2) irrespective of the output size (where as the output size k is O(n 2) only in the worst case). We also present a parallel algorithm based on a similar approach which runs in time O(log4(n+k)) using O((n + k)/Iog(n+k)) processors in a CREW PRAM model. All our bounds arc obtained using ammortized analysis
An efficient parallel algorithm for planarity
Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1986.MICROFICHE COPY AVAILABLE IN ARCHIVES AND ENGINEERINGBibliography: leaves 56-57.by Philip Nathan Klein.M.S
Parallel processing can be harmful: The unusual behavior of interpolation search
AbstractSeveral articles have noted the usefulness of a retrieval algorithm called sequential interpolation search, and Yao and Yao have proven a lower bound log logN−O(1), showing this algorithm is actually optimal up to an additive constant on unindexed files of sizeNgenerated by the uniform probability distribution. We generalize the latter to show log logN− log logP−O(1) lower bounds the complexity of any retrieval algorithm withPparallel processors for searching an unindexed file of sizeN. This result is surprising because we also show how to obtain an upper bound that matches the lower bound up to an additive constant with a procedure that actually usesno parallel processingoutside its last iteration (at which time our proposal turns onPprocessors in parallel). Our first theorem therefore states thatparallel processing before the literally last iterationin the search of an unindexed ordered file hasnearly no usefulness. Two further surprising facts are that the preceding result holds even when communication between the parallel processing units involvesno delayand that the parallel algorithms are actuallyinherently slowerthan their sequential counterparts when each invocation of the SIMD machine invokes a communication step withany typeof nonzerodelay. The presentation in the first two chapters of this paper is quite informal, so that the reader can quickly grasp the underlying intuition
An efficient parallel algorithm for planarity
AbstractWe describe a parallel algorithm for testing a graph for planarity, and for finding an embedding of a planar graph. For a graph on n vertices, the algorithm runs in O(log2n) steps on n processors of a parallel RAM. The previous best parallel algorithm for planarity testing also ran in O(log2n) time (J. Ja'Ja' and J. Simon, J Comput.11, No. 2 (1982), 313–328), but used a reduction to solving linear systems, and hence required Ω(M(n)log2n) processors, where M(n) is the sequential time for n × n matrix multiplication, whereas our processor bounds are within a polylog factor of optimal. The most significant aspect of our parallel algorithms is the use of a sophisticated data structure for representing sets of embeddings, the PQ-tree of K. Booth and G. Lueker, J. Comput. System Sci.13, No. 3 (1976), 335–379). Previously no parallel algorithms for PQ-trees were known. We have efficient parallel algorithms for manipulating PQ-trees, which we use in our planarity algorithm
Construction, analysis, ligation, and self-assembly of DNA triple crossover complexes
This paper extends the study and prototyping of unusual DNA motifs, unknown in nature, but founded
on principles derived from biological structures. Artificially designed DNA complexes show promise as building
blocks for the construction of useful nanoscale structures, devices, and computers. The DNA triple crossover
(TX) complex described here extends the set of experimentally characterized building blocks. It consists of
four oligonucleotides hybridized to form three double-stranded DNA helices lying in a plane and linked by
strand exchange at four immobile crossover points. The topology selected for this TX molecule allows for the
presence of reporter strands along the molecular diagonal that can be used to relate the inputs and outputs of
DNA-based computation. Nucleotide sequence design for the synthetic strands was assisted by the application
of algorithms that minimize possible alternative base-pairing structures. Synthetic oligonucleotides were purified,
stoichiometric mixtures were annealed by slow cooling, and the resulting DNA structures were analyzed by
nondenaturing gel electrophoresis and heat-induced unfolding. Ferguson analysis and hydroxyl radical
autofootprinting provide strong evidence for the assembly of the strands to the target TX structure. Ligation
of reporter strands has been demonstrated with this motif, as well as the self-assembly of hydrogen-bonded
two-dimensional crystals in two different arrangements. Future applications of TX units include the construction
of larger structures from multiple TX units, and DNA-based computation. In addition to the presence of reporter
strands, potential advantages of TX units over other DNA structures include space for gaps in molecular arrays,
larger spatial displacements in nanodevices, and the incorporation of well-structured out-of-plane components
in two-dimensional arrays
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