Robust and efficient Krylov subspace methods for Model Order Reduction

Due to the decreasing sizes of electrical devices used nowadays and the increasing frequency, the in??uence of the interconnect on the behavior of devices can no longer be neglected. For this reason, the simulation of passive structures must be combined with the simulation of active components, such as diodes and transistors. To truly couple these inherently different physical models, the generally large model of the interconnect structure has to be replaced by a smaller equivalent model. In performing this reduction, it is of importance to preserve the most important properties of the model as good as possible. Under certain assumptions the interconnect can be modeled as a linear system of differential algebraic equations. Even voor small parts of the interconnect structure, the number of equations in such a system can easily be a few thousand. Within the vast amount of available techniques to reduce the sizes of a model, Krylov subspace methods are the most suitable for this application, since they are relatively cheap and more generally applicable than other reduction methods. Moreover, Krylov subspace methods have the ability to preserve properties like stability and passivity for the classes of models considered here, something many other reduction techniques are not able to do. To ful??ll the demands set by the industrial application, reduction techniques should be robust, accurate, ef??cient and ??exible. In this thesis several algorithmic issues with respect to this robustness and ef??- ciency are considered. Furthermore, the synthesis of the reduced models in general circuit terms and as an RLC-circuit are proposed. The results of the research can be summarized as follows. Firstly, it is shown that the intermediate orthogonalisation of the columns in the Krylov subspace improves the robustness of the methods. Secondly, the order in which the Krylov subspace is generated is seen to be of importance. In addition, in the application of reduction methods, it was seen that an orthogonalisation that is done twice is essential for the robustness. As fourth relevant result, it was shown that a careful removal of de??ated columns can make the reduction methods more ef??cient. Also an error control is derived. With this error control a stopping criterion for the iterative proces can be derived. When the error is below a certain threshold, the iterative process stops. Finally, two methods are constructed that make the reduced models more easily available. One of the methods translates the reduced model in general terms, understandable for a circuit simulator. The second method uses RLC-circuit components with positive values. As a consequence, stability and passivity of this realization are evident. Since the synthesis method using RLC-circuit components needs an eigenvalue decomposition of the system, it can be combined easily with a method to remove redundant poles and residues. With all the propositions made in this thesis, an algorithm is developed which is able to handle large and complex problems in a robust and relatively ef??cient way. Examples are shown for the simulation of the EMbehavior of printed circuit boards, using a tool developed within Philips Research

Reduced order modelling of RLC-networks using an SVD-Laguerre based method

With interconnect increasingly contributing to the electrical behaviour of integrated circuits, both by higher frequencies and smaller dimensions, it becomes increasingly important to incorporate its behaviour into simulations of ICs. This can be done rather elegantly by summarizing interconnect behaviour into a compact or reduced order model which is then co-simulated with the circuit. A similar approach can be used in the case of more conventional printed circuit boards. The SVDLaguerre algorithm proposed by Knockaert and De Zutter [4] can be used for this purpose. In this paper, we describe an e#cient implementation of the algorithm for multiple inputs, and show how the mathematical reduced order models can be translated into realizable circuit elements

Krylov subspace methods in the electronic industry

Summary. Krylov subspace methods are well-known for their nice properties, but they have to be implemented with care. In this article the mathematical consequences encountered during implementation of Krylov subspace methods in an existing layout-simulator are discussed. Briefly, the representation in a circuit is visited and two methods to avoid parts of the redundancy are drawn