Justification, Conversation, and Folk Psychology

The aim of this paper is to offer a version of the so-called conversational hypothesis of the ontogenetic connection between language and mindreading (Harris 1996, 2005; Van Cleave and Gauker 2010; Hughes et al. 2006). After arguing against a particular way of understanding the hypothesis (the communicative view), I will start from the justificatory view in philosophy of social cognition (Andrews 2012; Hutto 2004; Zawidzki 2013) to make the case for the idea that the primary function of belief and desire attributions is to justify and normalize deviant patterns of behaviour. Following this framework, I elaborate upon the idea that development of folk psychological skills requires the subjects to engage in conversationally mediated joint and cooperative activities in order to acquire the conceptual capacity of ascribing propositional attitudes. After presenting the general version of the hypothesis, I present several testable sub-hypotheses and some psychological studies that give empirical plausibility to the hypothesis

Inner Speech and Metacognition: a defense of the commitment-based approach

A widespread view in philosophy claims that inner speech is closely tied to human metacognitive capacities. This so-called format view of inner speech considers that talking to oneself allows humans to gain access to their own mental states by forming metarepresentation states through the rehearsal of inner utterances (section 2). The aim of this paper is to present two problems to this view (section 3) and offer an alternative view to the connection between inner speech and metacognition (section 4). According to this alternative, inner speech (meta)cognitive functions derivate from the set of commitments we mobilize in our communicative exchanges. After presenting this commitment-based approach, I address two possible objections (section 5)

Gevrey expansions of hypergeometric integrals II

We study integral representations of the Gevrey series solutions of irregular hypergeometric systems under certain assumptions. We prove that, for such systems, any Gevrey series solution, along a coordinate hyperplane of its singular support, is the asymptotic expansion of a holomorphic solution given by a carefully chosen integral representation.Comment: 27 pages, 2 figure

A Reuse-based framework for the design of analog and mixed-signal ICs

Despite the spectacular breakthroughs of the semiconductor industry, the ability to design integrated circuits (ICs) under stringent time-to-market (TTM) requirements is lagging behind integration capacity, so far keeping pace with still valid Moore's Law. The resulting gap is threatening with slowing down such a phenomenal growth. The design community believes that it is only by means of powerful CAD tools and design methodologies -and, possibly, a design paradigm shift-that this design gap can be bridged. In this sense, reuse-based design is seen as a promising solution, and concepts such as IP Block, Virtual Component, and Design Reuse have become commonplace thanks to the significant advances in the digital arena. Unfortunately, the very nature of analog and mixed-signal (AMS) design has hindered a similar level of consensus and development. This paper presents a framework for the reuse-based design of AMS circuits. The framework is founded on three key elements: (1) a CAD-supported hierarchical design flow that facilitates the incorporation of AMS reusable blocks, reduces the overall design time, and expedites the management of increasing AMS design complexity; (2) a complete, clear definition of the AMS reusable block, structured into three separate facets or views: the behavioral, structural, and layout facets, the two first for top-down electrical synthesis and bottom-up verification, the latter used during bottom-up physical synthesis; (3) the design for reusability set of tools, methods, and guidelines that, relying on intensive parameterization as well as on design knowledge capture and encapsulation, allows to produce fully reusable AMS blocks. A case study and a functional silicon prototype demonstrate the validity of the paper's proposals.Ministerio de Educación y Ciencia TEC2004-0175

Geometrically-constrained, parasitic-aware synthesis of analog ICs

In order to speed up the design process of analog ICs, iterations between different design stages should be avoided as much as possible. More specifically, spins between electrical and physical synthesis should be reduced for this is a very time-consuming task: if circuit performance including layout-induced degradations proves unacceptable, a re-design cycle must be entered, and electrical, physical, or both synthesis processes, would have to be repeated. It is also worth noting that if geometric optimization (e.g., area minimization) is undertaken after electrical synthesis, it may add up as another source of unexpected degradation of the circuit performance due to the impact of the geometric variables (e.g., transistor folds) on the device and the routing parasitic values. This awkward scenario is caused by the complete separation of said electrical and physical synthesis, a design practice commonly followed so far. Parasitic-aware synthesis, consisting in including parasitic estimates to the circuit netlist directly during electrical synthesis, has been proposed as solution. While most of the reported contributions either tackle parasitic-aware synthesis without paying special attention to geometric optimization or approach both issues only partially, this paper addresses the problem in a unified way. In what has been called layout-aware electrical synthesis, a simulation-based optimization algorithm explores the design space with geometric variables constrained to meet certain user-defined goals, which provides reliable estimates of layout-induced parasitics at each iteration, and, thereby, accurate evaluation of the circuit ultimate performance. This technique, demonstrated here through several design examples, requires knowing layout details beforehand; to facilitate this, procedural layout generation is used as physical synthesis approach due to its rapidness and ability to capture analog layout know-how.Ministerio de Educación y Ciencia TEC2004-0175

On the suitability and development of layout templates for analog layout reuse and layout-aware synthesis

Accelerating the synthesis of increasingly complex analog integrated circuits is key to bridge the widening gap between what we can integrate and what we can design while meeting ever-tightening time-to-market constraints. It is a well-known fact in the semiconductor industry that such goal can only be attained by means of adequate CAD methodologies, techniques, and accompanying tools. This is particularly important in analog physical synthesis (a.k.a. layout generation), where large sensitivities of the circuit performances to the many subtle details of layout implementation (device matching, loading and coupling effects, reliability, and area features are of utmost importance to analog designers), render complete automation a truly challenging task. To approach the problem, two directions have been traditionally considered, knowledge-based and optimization-based, both with their own pros and cons. Besides, recently reported solutions oriented to speed up the overall design flow by means of reuse-based practices or by cutting off time-consuming, error-prone spins between electrical and layout synthesis (a technique known as layout-aware synthesis), rely on a outstandingly rapid yet efficient layout generation method. This paper analyses the suitability of procedural layout generation based on templates (a knowledge-based approach) by examining the requirements that both layout reuse and layout-aware solutions impose, and how layout templates face them. The ability to capture the know-how of experienced layout designers and the turnaround times for layout instancing are considered main comparative aspects in relation to other layout generation approaches. A discussion on the benefit-cost trade-off of using layout templates is also included. In addition to this analysis, the paper delves deeper into systematic techniques to develop fully reusable layout templates for analog circuits, either for a change of the circuit sizing (i.e., layout retargeting) or a change of the fabrication process (i.e., layout migration). Several examples implemented with the Cadence's Virtuoso tool suite are provided as demonstration of the paper's contributions.Ministerio de Educación y Ciencia TEC2004-0175

Load-independent characterization of trade-off fronts for operational amplifiers

Abstract—In emerging design methodologies for analog integrated circuits, the use of performance trade-off fronts, also known as Pareto fronts, is a keystone to overcome the limitations of the traditional top-down methodologies. However, most techniques reported so far to generate the front neglect the effect of the surrounding circuitry (such as the output load impedance) on the Pareto-front, thereby making it only valid for the context where the front was generated. This strongly limits its use in hierarchical analog synthesis because of the heavy dependence of key performances on the surrounding circuitry, but, more importantly, because this circuitry remains unknown until the synthesis process. We will address this problem by proposing a new technique to generate the trade-off fronts that is independent of the load that the circuit has to drive. This idea is exploited for a commonly used circuit, the operational amplifier, and experimental results show that this is a promising approach to solve the issue

Organizational-communicative impact of collective action "Las Periodistas Paramos" 2018 in Spain

Esta investigación analiza los resultados inmediatos y consecutivos de la acción colectiva “Las Periodistas Paramos” que tuvo lugar en España en 2018, a propósito de la huelga feminista del 8M. Se utilizan la revisión bibliográfica y la entrevista en profundidad para conocer las formas de organización establecidas como consecuencia de LPP, y su aporte al capital social del movimiento feminista. Entre los resultados se obtiene la creación de redes territoriales de mujeres, un cambio de perspectiva en torno a la igualdad de género en los medios de comunicación, así como una contribución efectiva de capital social a la cuarta ola del movimiento feminista.Universidad de Málaga. Campus de Excelencia Internacional Andalucía Tech