Interval simulation: raising the level of abstraction in architectural simulation

Detailed architectural simulators suffer from a long development cycle and extremely long evaluation times. This longstanding problem is further exacerbated in the multi-core processor era. Existing solutions address the simulation problem by either sampling the simulated instruction stream or by mapping the simulation models on FPGAs; these approaches achieve substantial simulation speedups while simulating performance in a cycle-accurate manner This paper proposes interval simulation which rakes a completely different approach: interval simulation raises the level of abstraction and replaces the core-level cycle-accurate simulation model by a mechanistic analytical model. The analytical model estimates core-level performance by analyzing intervals, or the timing between two miss events (branch mispredictions and TLB/cache misses); the miss events are determined through simulation of the memory hierarchy, cache coherence protocol, interconnection network and branch predictor By raising the level of abstraction, interval simulation reduces both development time and evaluation time. Our experimental results using the SPEC CPU2000 and PARSEC benchmark suites and the MS multi-core simulator show good accuracy up to eight cores (average error of 4.6% and max error of 11% for the multi-threaded full-system workloads), while achieving a one order of magnitude simulation speedup compared to cycle-accurate simulation. Moreover interval simulation is easy to implement: our implementation of the mechanistic analytical model incurs only one thousand lines of code. Its high accuracy, fast simulation speed and ease-of-use make interval simulation a useful complement to the architect's toolbox for exploring system-level and high-level micro-architecture trade-offs

Mechanistic modeling of architectural vulnerability factor

Reliability to soft errors is a significant design challenge in modern microprocessors owing to an exponential increase in the number of transistors on chip and the reduction in operating voltages with each process generation. Architectural Vulnerability Factor (AVF) modeling using microarchitectural simulators enables architects to make informed performance, power, and reliability tradeoffs. However, such simulators are time-consuming and do not reveal the microarchitectural mechanisms that influence AVF. In this article, we present an accurate first-order mechanistic analytical model to compute AVF, developed using the first principles of an out-of-order superscalar execution. This model provides insight into the fundamental interactions between the workload and microarchitecture that together influence AVF. We use the model to perform design space exploration, parametric sweeps, and workload characterization for AVF

Speedup stacks: identifying scaling Bottlenecks in multi-threaded applications

Multi-threaded workloads typically show sublinear speedup on multi-core hardware, i.e., the achieved speedup is not proportional to the number of cores and threads. Sublinear scaling may have multiple causes, such as poorly scalable synchronization leading to spinning and/or yielding, and interference in shared resources such as the lastlevel cache (LLC) as well as the main memory subsystem. It is vital for programmers and processor designers to understand scaling bottlenecks in existing and emerging workloads in order to optimize application performance and design future hardware. In this paper, we propose the speedup stack, which quantifies the impact of the various scaling delimiters on multithreaded application speedup in a single stack. We describe a mechanism for computing speedup stacks on a multi-core processor, and we find speedup stacks to be accurate within 5.1% on average for sixteen-threaded applications. We present several use cases: we discuss how speedup stacks can be used to identify scaling bottlenecks, classify benchmarks, optimize performance, and understand LLC performance

Mechanistic analytical modeling of superscalar in-order processor performance

Superscalar in-order processors form an interesting alternative to out-of-order processors because of their energy efficiency and lower design complexity. However, despite the reduced design complexity, it is nontrivial to get performance estimates or insight in the application--microarchitecture interaction without running slow, detailed cycle-level simulations, because performance highly depends on the order of instructions within the application’s dynamic instruction stream, as in-order processors stall on interinstruction dependences and functional unit contention. To limit the number of detailed cycle-level simulations needed during design space exploration, we propose a mechanistic analytical performance model that is built from understanding the internal mechanisms of the processor. The mechanistic performance model for superscalar in-order processors is shown to be accurate with an average performance prediction error of 3.2% compared to detailed cycle-accurate simulation using gem5. We also validate the model against hardware, using the ARM Cortex-A8 processor and show that it is accurate within 10% on average. We further demonstrate the usefulness of the model through three case studies: (1) design space exploration, identifying the optimum number of functional units for achieving a given performance target; (2) program--machine interactions, providing insight into microarchitecture bottlenecks; and (3) compiler--architecture interactions, visualizing the impact of compiler optimizations on performance

Social movements, class, and adult education

Social movements are movements of people in civil society who cohere around issues and identities that they themselves define as significant (Martin, 1999). The following quotation describes a group of poor women in South Africa, a group calling itself People’s Dialogue, who are mobilizing around their need for houses. They are part of a social movement of women and men internationally who are collectively struggling for access to land and houses.Web of Scienc

Obstacles and benefits in implementation of gold, silver, and bronze (GSB) model in emergency response in the UAE

The United Arab Emirates (UAE) is vulnerable to natural disasters such as earthquakes, floods, and tsunamis. Emergency response and incident command model have been implemented to help mitigate against these hazards in various part of the world. More recently, the Gold, Silver, and Bronze (GSB) model of incident command has been adopted in the UAE to integrate joint efforts, to control over emergency response and incident management at the local, regional and the national levels. The GSB model was originally established in the UK to organize efforts for quick control on incidents and has since been adopted by the UAE. In the UAE context, the GSB model provides commanders with clear responsibilities during emergencies and facilitates coordination between the commanders and partners towards achieving its desired benefits. The study deploys a case study research strategy, qualitative exploratory research design as a methodological choice to understand the current GSB obstacles and benefits in the context of the UAE’s Civil Defense General Command (CDGC). Thematic and content analysis is used to analyse the semi-structured interviews with senior commanders. Despite having applied the GSB model successfully, the qualitative findings demonstrate the CDGC has faced many obstacles related to it is efficiency in responding incidents. In contrast, the GSB model has defined the roles and responsibilities of commanders during incidents and thus organized the incident response procedures in a way that each commander achieves

Police Using Photoshop to Alter a Suspect\u27s Photo in Lineup and Courts Allowing It: Does it Violate Due Process?

Eyewitness identification remains one of the most popular pieces of evidence in criminal trials despite the decades of research supporting this evidence unreliability. In August 2019, the federal case United State v. Allen became nationwide news when it was revealed that police used Photoshop to remove Allen’s facial tattoo before using the altered-photo in a photo array. None of the eyewitnesses described the culprit as having a facial tattoo, though they identified Allen from the array. Allen is not the only case to have police use Photoshop to edit photos used in arrays. This has been a common practice used by many law enforcement departments in an effort to create fairer identification procedures. Despite this intention, the use of Photoshop raises questions about the reliability of the identifications, and whether this practice supports the Supreme Court’s Manson v. Braithwaite standard. This Comment examines how police use digital editing programs to alter photos in arrays, and then discusses the different scenarios when this practice would be appropriate, and how, when inappropriately done, such photos will negatively impact criminal defendant’s due process rights

Plasma membrane recovery kinetics of a microfluidic intracellular delivery platform

Intracellular delivery of materials is a challenge in research and therapeutic applications. Physical methods of plasma membrane disruption have recently emerged as an approach to facilitate the delivery of a variety of macromolecules to a range of cell types. We use the microfluidic CellSqueeze delivery platform to examine the kinetics of plasma membrane recovery after disruption and its dependence on the calcium content of the surrounding buffer (recovery time ~5 min without calcium vs. ~30 s with calcium). Moreover, we illustrate that manipulation of the membrane repair kinetics can yield up to 5× improvement in delivery efficiency without significantly impacting cell viability. Membrane repair characteristics initially observed in HeLa cells are shown to translate to primary naïve murine T cells. Subsequent manipulation of membrane repair kinetics also enables the delivery of larger materials, such as antibodies, to these difficult to manipulate cells. This work provides insight into the membrane repair process in response to mechanical delivery and could potentially enable the development of improved delivery methods.National Institutes of Health (U.S.) (Grant RC1 EB011187-02)National Institutes of Health (U.S.) (Grant R01GN101420-01A1)Kathy and Curt Marble Cancer Research FundNational Cancer Institute (U.S.) (Cancer Center Support (Core) Grant P30-CA14051)National Cancer Institute (U.S.) (Cancer Center Support (Core) Grant MPP-09Call-Langer-60

Cultural trauma, counter-narratives, and dialogical intellectuals: the works of Murakami Haruki and Mori Tatsuya in the context of the Aum affair

In this article, we offer a new conceptualization of intellectuals as carriers of cultural trauma through a case study of the Aum Affair, a series of crimes and terrorist attacks committed by the Japanese new religious movement Aum Shinrikyō. In understanding the performative roles intellectuals play in trauma construction, we offer a new dichotomy between “authoritative intellectuals,” who draw on their privileged parcours and status to impose a distinct trauma narrative, and “dialogical intellectuals,” who engage with local actors dialogically to produce polyphonic and open-ended trauma narratives. We identify three dimensions of dialogical intellectual action: firstly, the intellectuals may be involved in dialogue with local participants; secondly, the intellectual products themselves may be dialogical in content; and thirdly, there might be a concerted effort on the part of the intellectuals to record and to disseminate dialogue between local participants. In the context of the Aum Affair, we analyze the works of Murakami Haruki and Mori Tatsuya as dialogical intellectuals while they sought, with the help of local actors’ experiences, to challenge and to alter the orthodox trauma narrative of Aum Shinrikyō as exclusively a social evil external to Japanese society and an enemy to be excluded from it. Towards the end of the article, we discuss the broader significance of this case study and suggest that in light of recent societal and technological developments, the role and scope of dialogical intellectuals as carriers of trauma are changing and possibly expanding