Verfahren zur simulativen Modellierung der Gleichtaktanregung

Die Anforderungen an die elektromagnetische Verträglichkeit (EMV) leistungselektronischer Systeme erfordern bei deren Design eine detaillierte Modellierung der durch die Schalthandlungen verursachten Störanregung. Dabei wird abhängig vom Kopplungspfad zwischen Gleichund Gegentaktstörung unterschieden. Der vorliegende Beitrag beschäftigt sich mit der Modellierung der Anregung des Gleichtaktsystems, der Gleichtaktanregung. Zur Modellierung der Gleichtaktanregung sind aus der Literatur verschiedene Ansätze [1-6] bekannt, welche die Schaltflanke abschnittsweise im Zeitund Frequenzbereich parametrieren. In diesem Beitrag wird ein neuer Ansatz zur Modellierung der Gleichtaktanregung mit PT-Gliedern vorgestellt. Die Vorteile verglichen mit bisherigen Ansätzen sind einerseits die effiziente Berechnung über einen weiten Zeitund Frequenzbereich, wodurch ein abschnittsweises Parametrieren entfällt, und andererseits die intuitive Modellierung von Überschwingern und Spannungsschweif. Zum Vergleich werden verschiedene Ansätze gegenübergestellt und anhand von Messungen an einem kommerziellen IGBT-Modul (Infineon HybridPACK2 mit 800 A Nennstrom) bewertet

COVID-19 symptoms at hospital admission vary with age and sex: results from the ISARIC prospective multinational observational study

Background: The ISARIC prospective multinational observational study is the largest cohort of hospitalized patients with COVID-19. We present relationships of age, sex, and nationality to presenting symptoms. Methods: International, prospective observational study of 60 109 hospitalized symptomatic patients with laboratory-confirmed COVID-19 recruited from 43 countries between 30 January and 3 August 2020. Logistic regression was performed to evaluate relationships of age and sex to published COVID-19 case definitions and the most commonly reported symptoms. Results: ‘Typical’ symptoms of fever (69%), cough (68%) and shortness of breath (66%) were the most commonly reported. 92% of patients experienced at least one of these. Prevalence of typical symptoms was greatest in 30- to 60-year-olds (respectively 80, 79, 69%; at least one 95%). They were reported less frequently in children (≤ 18 years: 69, 48, 23; 85%), older adults (≥ 70 years: 61, 62, 65; 90%), and women (66, 66, 64; 90%; vs. men 71, 70, 67; 93%, each P < 0.001). The most common atypical presentations under 60 years of age were nausea and vomiting and abdominal pain, and over 60 years was confusion. Regression models showed significant differences in symptoms with sex, age and country. Interpretation: This international collaboration has allowed us to report reliable symptom data from the largest cohort of patients admitted to hospital with COVID-19. Adults over 60 and children admitted to hospital with COVID-19 are less likely to present with typical symptoms. Nausea and vomiting are common atypical presentations under 30 years. Confusion is a frequent atypical presentation of COVID-19 in adults over 60 years. Women are less likely to experience typical symptoms than men

Reducing device stress and switching losses using active gate drivers and improved switching cell design

Today’s power converter designs, especially in the automotive or the all-electrical aircraft industry, aim at higher power densities. These goals can be achieved with an increased integration level and a transition from silicon insulated-gate bipolar transistors (IGBTs) to fast switching wide-bandgap (WBG) devices. The aims of this thesis are to investigate the influence of the packages and the driving circuits on the switching behavior of silicon (Si) IGBTs and silicon carbide (SiC) metal-oxide semiconductor field-effect transistors (MOSFETs). The peak voltages and surge currents during switching determine the stress on the devices. The stress depends on several parasitic elements in and around the switching cell and the gate driving circuitry. A reduction of the stress could result in the possibility to utilize a higher dc-link voltage or increased efficiency, and thus, lead to significant cost reduction. First, simulative and measurement techniques to identify and parametrize inductive and capacitive parasitics of the packages are shown. The presented concepts are demonstrated using a power module package and a common package of a discrete power semiconductor. As such, a wide range of different power electronics packages are covered in this thesis. In a second step, the influence of the different parasitic inductive elements on the switching transients is investigated. Therefore, a switching cell using variable inductive elements is developed. The variable inductive elements are the loop, gate and common-source inductances for both, the low- and high-side switches. The impact of each inductive element on the switching behavior is investigated regarding the stress on the device and the resulting switching losses. The limitations of the cell design on the switching performance and the causes for the observed oscillations are identified. Conclusions are drawn for improved power module designs for low- and medium-voltage applications. To influence the switching behavior of the device, a switched resistor, stage-wise gate driver is designed for a silicon IGBT power module, and a SiC MOSFET switching cell. The challenges of an active gate driver design for fast switching wide-bandgap power semiconductors and the challenges of high-bandwidth voltage and current measurements are discussed. For both, the IGBT and the SiC MOSFET, the stresses are reduced while maintaining equal switching losses. It is shown that the switching transients can be manipulated to balance device stresses and switching losses. The use of active gate drivers shows, that it is possible to reduce the stress on the device in addition to the impact of the switching cell design. As such, it is shown in this thesis, that the switching performance can be further improved for power semiconductors in packages that are electrically not optimal, due to third-party design and production constraints