Polynomial-based surrogate modeling of microwave structures in frequency domain exploiting the multinomial theorem

We propose a methodology for developing EM-based polynomial surrogate models exploiting the multinomial theorem. Our methodology is compared against four EM surrogate modeling techniques: response surface modeling, support vector machines, generalized regression neural networks, and Kriging. Results show that the proposed polynomial surrogate modeling approach has the best performance among these techniques when using a very small amount of learning base points. The proposed methodology is illustrated by developing a surrogate model for a T-slot PIFA antenna simulated on a commercially available 3D FEM simulator

Polynomial-based surrogate modeling of RF and microwave circuits in frequency domain exploiting the multinomial theorem

A general formulation to develop EM-based polynomial surrogate models in frequency domain utilizing the multinomial theorem is presented in this paper. Our approach is especially suitable when the number of learning samples is very limited and no physics-based coarse model is available. We compare our methodology against other four surrogate modeling techniques: response surface modeling, support vector machines, generalized regression neural networks, and Kriging. Results confirm that our modeling approach has the best performance among these techniques when using a very small amount of learning base points on relatively small modeling regions. We illustrate our technique by developing a surrogate model for an SIW interconnect with transitions to microstrip lines, a dual band T-slot PIFA handset antenna, and a high-speed package interconnect. Examples are simulated on a commercially available 3D FEM simulator

Reliable full-wave EM simulation of a single-layer SIW interconnect with transitions to microstrip lines

We present a procedure to obtain reliable EM responses for a substrate integrated waveguide (SIW) interconnect with microstrip line transitions. The procedure focuses on two COMSOL configuration settings: meshing sizes and simulation bounding box. Once both are properly configured, the implemented structure is tested by perturbing the simulation bounding box to assure it has no effect on the EM responsesITESO, A.C

Design Optimization of Full-Wave EM Models by Low-Order Low-Dimension Polynomial Surrogate Functionals

A practical formulation for EM-based design optimization of high-frequency circuits using simple polynomial surrogate functionals is proposed in this paper. Our approach starts from a careful selection of design variables and is based on a closed-form formulation that yields global optimal values for the surrogate model weighting factors, avoiding a large set of expensive EM model data, and resulting in accurate low-order low-dimension polynomials interpolants that are used as vehicles for efficient design optimization. Our formulation is especially suitable for EM-based design problems with no equivalent circuital models available. The proposed technique is illustrated by the EM-based design optimization of a Ka-band substrate integrated waveguide (SIW) interconnect with conductor-backed coplanar waveguide (CBCPW) transitions, a low crosstalk PCB microstrip interconnect structure with guard traces, and a 10-40 GHz SIW interconnect with microstrip transitions on a standard FR4-based substrate. Three commercially available full-wave EM solvers are used in our examples: CST, Sonnet and COMSOL

Surrogate-based Analysis and Design Optimization of Power Delivery Networks

As microprocessor architectures continue to increase computing performance under low-energy consumption, the combination of signal integrity, electromagnetic interference, and power delivery is becoming crucial in the computer industry. In this context, power delivery engineers make use of complex and computationally expensive models that impose time-consuming industrial practices to reach an adequate power delivery design. In this paper, we propose a general surrogate-based methodology for fast and reliable analysis and design optimization of power delivery networks (PDN). We first formulate a generic surrogate model methodology exploiting passive lumped models optimized by parameter extraction to fit PDN impedance profiles. This PDN modeling formulation is illustrated with industrial laboratory measurements of a 4th generation server CPU motherboard. We next propose a black box PDN surrogate modeling methodology for efficient and reliable power delivery design optimization. To build our black box PDN surrogate, we compare four metamodeling techniques: support vector machines, polynomial surrogate modeling, generalized regression neural networks, and Kriging. The resultant best metamodel is then used to enable fast and accurate optimization of the PDN performance. Two examples validate our surrogate-based optimization approach: a voltage regulator with dual power rail remote sensing intended for communications and storage applications, by finding optimal sensing resistors and loading conditions; and a multiphase voltage regulator from a 6th generation Intel® server motherboard, by finding optimal compensation settings to reduce the number of bulk capacitors without losing CPU performance.ITESO, A.C

Selecting Surrogate-Based Modeling Techniques for Power Integrity Analysis

In recent years, extensive usage of simulated power integrity (PI) models to predict the behavior of power delivery networks (PDN) on a chip has become more relevant. Predicting adequate performance against power consumption can yield to either cheap or costly design solutions. Since PI simulations including high-frequency effects are becoming more and more computationally complex and expensive, it is critical to develop reliable and fast models to understand system’s behavior to accelerate decision making during design stages. Hence, metamodeling techniques can help to overcome this challenge. In this work, a comparative study between different surrogate modeling techniques as applied to PI analysis is described. We model and analyze a PDN that includes two different power domains and a combination of remote sense resistors for communication and storage CPU applications. We aim at developing reliable and fast coarse models to make trade off decisions while complying with voltage levels and power consumption requirements

Reconfigurable FIR Filter Coefficient Optimization in Post-Silicon Validation to Improve Eye Diagram for Optical Interconnects

Enhanced small form-factor pluggable (SFP+) is a specification for a new generation of optical modular transceivers. The devices are designed for use with small form factor (SFF) connectors, and offer high speed and physical compactness. SFP+ modules require high-quality ASIC/SerDes transmitters (Tx) because IEEE and fibre channel standards place strict requirements on the optical interface, and linear/limiting SFP+ module types have Tx paths that do not correct for timing jitter. This introduces a design challenge to guarantee performance over process, temperature, and voltage (PVT) conditions. Adjusting the Tx equalization across PVT and different interconnect channels can be a time-consuming task in post-silicon validation. In order to overcome this problem, this paper proposes a direct optimization method based on a suitable objective function formulation to efficiently tune the Tx equalizer and optimize the eye diagram to successfully comply with industrial specifications

Machine learning techniques and space mapping approaches to enhance signal and power integrity in high-speed links and power delivery networks

Enhancing signal integrity (SI) and reliability in modern computer platforms heavily depends on the post-silicon validation of high-speed input/output (HSIO) links, which implies a physical layer (PHY) tuning process where equalization techniques are employed. On the other hand, the interaction between SI and power delivery networks (PDN) is becoming crucial in the computer industry, imposing the need of computationally expensive models to also ensure power integrity (PI). In this paper, surrogate-based optimization (SBO) methods, including space mapping (SM), are applied to efficiently tune equalizers in HSIO links using lab measurements on industrial post-silicon validation platforms, speeding up the PHY tuning process while enhancing eye diagram margins. Two HSIO interfaces illustrate the proposed SBO/SM techniques: USB3 Gen 1 and SATA Gen 3. Additionally, a methodology based on parameter extraction is described to develop fast PDN lumped models for low-cost SI-PI co-simulation; a dual data rate (DDR) memory sub-system illustrates this methodology. Finally, we describe a surrogate modeling methodology for efficient PDN optimization, comparing several machine learning techniques; a PDN voltage regulator with dual power rail remote sensing illustrates this last methodology.ITESO, A.C

System Margining Surrogate-Based Optimization in Post-Silicon Validation

There is an increasingly higher number of mixed-signal circuits within microprocessors. A significant portion of them corresponds to high-speed input/output (HSIO) links. Post-silicon validation of HSIO links is critical to provide a release qualification decision. One of the major challenges in HSIO electrical validation is the physical layer (PHY) tuning process, where equalization techniques are typically used to cancel any undesired effect. Current industrial practices for PHY tuning in HSIO links are very time consuming since they require massive lab measurements. On the other hand, surrogate modeling techniques allow to develop an approximation of a system response within a design space of interest. In this paper, we analyze several surrogate modeling methods and design of experiments techniques to identify the best approach to efficiently optimize a receiver equalizer. We evaluate the models performance by comparing with actual measured responses on a real server HSIO link. We then perform a surrogate-based optimization on the best model to obtain the optimal PHY tuning settings of a HSIO link. Our methodology is validated by measuring the real functional eye diagram of the physical system using the optimal surrogate model solution

Post-silicon Receiver Equalization Metamodeling by Artificial Neural Networks

As microprocessor design scales to the 10 nm technology and beyond, traditional pre- and post-silicon validation techniques are unsuitable to get a full system functional coverage. Physical complexity and extreme technology process variations severely limits the effectiveness and reliability of pre-silicon validation techniques. This scenario imposes the need of sophisticated post-silicon validation approaches to consider complex electromagnetic phenomena and large manufacturing fluctuations observed in actual physical platforms. One of the major challenges in electrical validation of high-speed input/output (HSIO) links in modern computer platforms lies in the physical layer (PHY) tuning process, where equalization techniques are used to cancel undesired effects induced by the channels. Current industrial practices for PHY tuning in HSIO links are very time consuming since they require massive lab measurements. An alternative is to use machine learning techniques to model the PHY, and then perform equalization using the resultant surrogate model. In this paper, a metamodeling approach based on neural networks is proposed to efficiently simulate the effects of a receiver equalizer PHY tuning settings. We use several design of experiments techniques to find a neural model capable of approximating the real system behavior without requiring a large amount of actual measurements. We evaluate the models performance by comparing with measured responses on a real server HSIO link