Automated Design Rule Checking

A Fortran Coded Design Rule Checker was written to analyze the output file of the RIT Integrated Circuit Editor (ICE) program. The design rules for the RIT 4LEVELPMOS process have been successfully implemented for a die size of 1900 by 1900 square micrometers

Love\u27s Oracle : Mazurka - Impromptu

https://digitalcommons.library.umaine.edu/mmb-ps/3262/thumbnail.jp

Murmuring Brook

https://digitalcommons.library.umaine.edu/mmb-ps/3266/thumbnail.jp

If Thou Thy Heart Wilt Give Me : Melodie

https://digitalcommons.library.umaine.edu/mmb-ps/3261/thumbnail.jp

May Bells

https://digitalcommons.library.umaine.edu/mmb-ps/3296/thumbnail.jp

Little Dearest : Enfant Cheri

https://digitalcommons.library.umaine.edu/mmb-ps/3394/thumbnail.jp

Glissando - Mazurka

https://digitalcommons.library.umaine.edu/mmb-ps/3370/thumbnail.jp

Goldfishes : Mazurka

https://digitalcommons.library.umaine.edu/mmb-ps/3286/thumbnail.jp