TFT and ULSI technologies: The parallel evolution of the research and the higher education in France

This paper deals with the evolution since the early eighties of the microelectronics applied to integrated circuits and to large area electronics. The evolution in France was linked to a very strong effort of the French government (Microelectronics national plan) to improve the Higher Education in this field and to form with the knowledge and the know-how the future engineers, masters and doctors to the research and development and to the production. A way to help the growth of microelectronics companies mainly in France, but also for the world in the frame of multinational companies. More recently, a new national plan was engaged in the frame of the French Large Investment Commissariat with the goal to improve the large area technology and the integrated technologies and to be adapted to the digital society coming. Connecting objects and Internet of Things are mainly mixing the different components of the electronics and microelectronics domains [1]. After a synthetic presentation of the evolution of the two main technologies developed in research and development centers and in academic laboratories, the paper highlights the strategy developed by the French community based on the innovation [2]. The interesting point is that, if at the beginning the two domains appear independent, the evolution of the process and the fabulous evolution of the CAD tools is making closer and closer the design and fabrication approaches by combining the two technologies. For example the FDSOI (Fully Depleted Silicon on Insulator) concept was in practice existing since many years in thin film transistor technology deposited at a relatively low temperature

ULSI and TFT technologies in industry, research and higher education in France: An evolution towards innovation resulting from close and sustainable interaction

The semiconductor industry and associated microelectronic production began in France in the early 1980s as part of the national microelectronics plan launched by the French government to meet the needs of new economic sectors that are heavy users of microelectronic products. Indeed, microelectronic circuits, devices and systems are the key elements of the information technology field, which includes computer and communications capabilities, and application fields such as aerospace, transport, and energy, mainly. Several new technologies had to be developed, corresponding to the first advent of communication tools such as Minitel (ancestor of the web) or credit cards, which then underwent huge development. This implied a major effort on both integrated silicon technologies and large area electronics technologies oriented flat panel displays on glass substrates (low temperature process). The latter were to replace the cathode ray tube. Let us notice that due to the drastic reduction of dimensions in ULSI technologies, the thermal budget significantly decreased and both technological approaches progressively converged; today, many deposition techniques are common, for example. In parallel with the major effort towards the microelectronics industry, the French government has decided to improve higher education in this field and to train future engineers, masters and doctors in research and development and manufacturing with the corresponding knowledge and know-how. More recently, a new national plan has been launched by the French “Commissariat aux Grands Investissements” (Future Invest Plan or PIA1) to improve large area and integrated technologies and adapt to the digital society of the future. This focuses on connected objects and the Internet of Things, products that mainly combine the different components of the fields of microelectronics [1] and more particularly integrated technologies, embedded electronics and large area technologies suitable for flat panel displays, sensors and actuators, but also components of other domains linked to their applications. This supposed also multidisciplinarity [2]. As a consequence, the training of graduate students must follow this evolution in order to well meet the needs of companies and research laboratories with a clear orientation towards innovation. A specific French national program was launched in 2011 and entitled IDEFI for Excellence Initiative for Innovative education in order to set-up innovative formations that may correspond to new pedagogical approach and new content of curricula adapted to the new technologies. The French national network in microelectronics, CNFM [4], applied and succeeded with the project entitled FINMINA [5] for Innovative training in microelectronics and nanotechnologies. With the advent of new educational technologies based mainly on online training such as MOOCs, the strategy has focused on the know-how part of learning. The 12 common centers of the French microelectronics network (CNFM), which include numerous design platforms, cleanrooms, and characterization and testing platforms, have engaged in innovative training projects covering all microelectronics sectors, targeting future applications of connected objects and the industry 4.0. After a presentation of the context of microelectronics and the evolution of ULSI and TFT technologies, both in academic research and industrial environments, the paper highlights the strategy developed by the French academic and microelectronics community around innovation. Examples of the development by students of future integrated components up to the nanoscale, system-on-chip combining integrated and large area technologies will be presented. The ultimate objective is to best meet the societal needs of the 21st century. References 1.O. Bonnaud, Int. J. Plasma Environmental Science & Technology, vol. 10, no. 2, pp. 115-120, (2016). 2.O. Bonnaud and L. Fesquet, Proc. of MSE’2015, Publisher IEEE, 4 pages, Pittsburg (MS), USA, (2015). 3.O. Bonnaud, ECS Transaction, 67(1), 147-158 (2015). 4.GIP-CNFM; Public Interest Group - National Coordination for Education in Microelectronics and nanotechnologies, http://www.cnfm.fr 5.FINMINA: IDEFI project: ANR-11-IDFI-0017 See website of CNF

Innovative Strategy to Meet the Challenges of the Future Digital Society

Today, we are experiencing a societal revolution with the development of digital technologies, and it brings new challenges. Indeed, the number of connected objects, intelligent sensors and IoTs are increasing exponentially. The same goes for the resulting energy consumption. Beyond 2030, without a radical transformation of communication technologies and protocols, the digital world will be at an energy dead end. All these objects are physically realized with microelectronic devices and systems. This analysis of the microelectronics community has led the French government to recognize an electronics sector that is becoming a priority area of industrial policy. The Strategic Committee of this sector has proposed innovations applied to the entire digital chain including all facets of the microelectronics field and human skills and know-how. The technological and energy issues are thus presented, and the proposed solutions were addressed. They concern both technological and human aspects. This paper ends by giving examples of the implementation of innovative approaches which essentially include the electronic functions involved in connected objects and which are intended to bring the know-how of future actors in the field

Invited; ULSI and TFT technologies joint forces to meet the future challenges of a pervasive digital society

The worldwide development of communication and data exchange systems, as well as research on environmental protection, have strongly encouraged the development of digital technology. This technology has been growing exponentially since 2005 and its evolution would rather go towards an acceleration of this growth due to the emergence of cryptocurrencies, such as blockchains (Bitcoin, Litecoin, or Ethereum), the 5G or artificial intelligence. The transparency of the operation of these tools on the user\u27s side makes us forget that the associated energy consumption is also growing exponentially and that we could reach a global dead end in less than 10 years, with the electrical consumption of digital technology exceeding the current world electrical production. Please click Download on the upper right corner to see the full abstract

Adaptation of the Higher Education in Engineering to the Advanced Manufacturing Technologies

The 21st century will be the era of the fourth industrial revolution with the progressive introduction of the digital society, with smart/connected objects, smart factories driven by robotics, the Internet of Things (IoT) and artificial intelligence. Manufacturing should be performed by the industry entitled 4.0. These are advanced technologies resulting from steady development of information technology associated with new objects and systems that can fulfil manufacturing tasks. The industry 4.0 concept relies largely on the ability to design and manufacture smart and connected devices that are based on microelectronics technology. This evolution requires highly-skilled technicians, engineers and PhDs well prepared for research, development and manufacturing. Their training, which combines knowledge and the associated compulsory know-how, is becoming the main challenge for the academic world. The curricula must therefore contain the basic knowledge and associated know-how training in all the specialties in the field. The software and hardware used in microelectronics and its applications are becoming so complex and expensive that the most realistic solution for practical training is to share facilities and human resources. This approach has been adopted by the French microelectronics education network, which includes twelve joint university centres and 2 industrial unions. It makes it possible to minimize training costs and to train future graduates on up-to-date tools similar to those used in companies. Thus, this paper deals with the strategy adopted by the French network in order to meet the needs of the future industry 4.0

On the way of harmonization of PhD in Europe in Electrical and Information Engineering: status and recommendations

International audienceIn the frame of the thematic networks devoted to the development of LifeLong Learning (LLL) in Europe, the ELLEIEC project, more especially focused on Electrical and Information Engineering, the situation of PhD students in Europe was analyzed. Thanks to a questionnaire submitted to all the members of this network, an overview on 23 European countries was obtained. This paper tries to highlight the several aspects of the status and proposes recommendations in order to make easier the mobility and exchange in Europe at PhD level. The final part of this work is devoted to recommendations to the European partners in order to improve the present situation and to create a real European space for doctoral studies

P-type and N-type multi-gate polycrystalline silicon vertical thin film transistors based on low-temperature technology

International audienceP-type and N-type multi-gate vertical thin film transistors (vertical TFTs) have been fabricated, adopting the low-temperature (T ⩽ 600 °C) polycrystalline silicon (polysilicon) technology. Stacked heavily-doped polysilicon source and drain are electrically isolated by an insulating barrier. Multi-teeth configuration is defined by reactive ion etching leading to sidewalls formation on which undoped polysilicon active layer is deposited. All the polysilicon layers are deposited from low pressure chemical vapor deposition (LPCVD) technique. Vertical TFTs are designed with multi gates, in order to have a higher equivalent channel width. Different active layer thicknesses have been attempted, and an ION/IOFF ratio slightly higher than 105 is obtained. P-type and N-type vertical TFTs have shown symmetric electrical characteristics. Different geometrical parameters have been chosen. IOFF is proportional to the single channel width, and to the tooth number. ION is only proportional to the tooth number. These devices open the way of a CMOS-like technology

Innovation for Education on Internet of Things

The Internet of Things (IoT) and related objects are becoming more prevalent around the world with exponential growth for the next fifteen years. This evolution implies innovation in many fields of technology, whose core is in microelectronics. Indeed, IoT deals with all societal applications such as health, the environment, transport, energy and communications. Thus, connected objects involve many technological components: sensors and actuators, signal processing circuits, data transmission circuits and systems, energy recovery systems, which directly depend on the performance of microelectronics. To create new connected objects, innovation is the main driver. Innovation results from the combination of a multidisciplinary approach, links between disciplines and the necessary know-how of engineers and technicians. This paper deals with the orientation of pedagogy towards these objectives through the development of dedicated and innovative platforms in microelectronics. These platforms are developed by the French National Microelectronics Education Network (CNFM). After presenting the context of IoT and the evolution of microelectronics technologies, this article highlights the main components of connected objects applied to many societal applications. Each component of the objects requires specific microelectronic devices or circuits. Innovation appears in the nature of platforms, the multidisciplinary approach of training, the permanent links between disciplines, and the adaptation to new educational tools, mainly online. The results of the training on innovative platforms are presented and discussed

Grafted d/l-lactide to cellulose acetate by reactive melt processing: Its role as CA/PLA blend compatibilizer

AbstractCellulose acetate (CA) with a degree of substitution (DS) of 2.5 and polylactic acid (PLLA) were plasticized by melt extrusion using triacetin. Blends of resulting thermoplastic materials were then prepared and characterized by their tensile strength and differential scanning calorimetry (DSC). Thermal analysis revealed the invariability of the PLLA glass transition temperature in all blends, indicating that the compounds were immiscible. Grafted d/l lactide to CA copolymers were prepared by reactive melt processing using CA with different degree of substitution i.e. 2.1 and 2.5 and evaluated as CA/PLLA blend compatibilizer. The compatibility of the blends was investigated by scanning electron microscopy (SEM). Results showed that blend compatibility was improved evidencing the best performance of grafted copolymers with long grafted chains as blend compatibilizer of CA/PLLA blends. Finally, compatibilized blends compositions with enhanced ultimate elongation were achieved by using plasticized PLLA instead of neat PLLA