62,756 research outputs found
Digital synchronizer Patent
Digital synchronizer for extracting binary data in receiver of PSK/PCM communication syste
Block encoders for Reed-Muller codes
Encoding algorithms generate a 32 x 64-bit matrix Reed-Muller code from a 6-bit orthogonal code-word. This increases error-free reception by a high rate telemetry channel under adverse signal noise with minimal use of additional hardware
Monitoring system determines amplitude and time of vibration channel peaks
Adaptive scheme advocated in this innovation will reduce processing time and is applicable to environmental testing and to space-borne or aircraft-borne vibration monitoring devices requiring a large number of channels
Decoder system Patent
Binary data decoding device for use at receiving end of communication channe
Frequency control circuit for all-digital phase-lock loops
Phase-lock loop references all its operations to fixed high-frequency service clock operating at highest speed which digital circuits permit. Wide-range control circuit provides linear control of frequency of reference signal. It requires only two counters in combination with control circuit consisting only of flip-flop and gate
Simple first order data compression processor concept
Data-compression processing systems based on an analog-to-digital converter /ADC/, includes a qualitative comparator for comparison of the ADC output with a ramp generator, which is connected as a bidirectional binary counter with selective inputs. A bidirectional ramp counter selects the proper ramp through a ramp generator selection network
Ranging code processor
System extracts range data from pseudorandom-coded range radar used to track a moving body. Pseudorandom binary waveforms with favorable correlation properties are transmitted and their reflections received and processed. The phase difference between the received and transmitted codes gives an accurate measure of the distance to the moving body
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