13 research outputs found

    Trapping phenomena and degradation mechanisms in GaN-based power HEMTs

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    Abstract This paper reports an overview of the most relevant trapping and degradation mechanisms that limit the performance and lifetime of GaN-based transistors for application in power electronics. Results obtained on state-of-the-art devices are described and discussed throughout the paper, with the aim of providing a clear description of the topic. The first part of the paper deals with the issue of dynamic-Ron: after describing a robust test strategy for the analysis of the pulsed characteristics of the devices, we discuss the voltage- and temperature-dependent pulsed I-V characteristics of 650 V-rated transistors, and the physical origin of dynamic Ron in these devices. The results demonstrate that through proper buffer optimization it is possible to reach negligible trapping at high voltage. The properties of the traps responsible for dynamic-Ron are also discussed in detail in the paper, based on drain-current transient data. A specific discussion is devoted to hot-electron trapping processes, that – under hard switching conditions – may lead to significant modifications in the resistance of the 2DEG. The second part of the paper deals with device degradation: based on a wide set of experimental results, we describe the physical mechanisms responsible for the worsening of the properties of the devices. More specifically, we demonstrate that stress in off-state conditions may result in measurable changes in the pinch-off voltage, mostly consisting in a negative-threshold instability (NBTI). The origin of this shift is discussed in detail; we also demonstrate that in a real-life cascode configuration (where a low, subthreshold leakage current flows through the device in the off-state), NBTI effects are mitigated. Finally, we discuss the stability of the gate-stack, induced by the exposure to positive gate bias

    Characterization and Study of Reliability Aspects in GaN High ElectronMobility Transistors

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    GaN-based high electron mobility transistors (HEMTs) have excellent performance for power applications. Indeed, characteristics such as the high breakdown electric filed (3.3 MV/cm), the low ON-Resistance (RON) and the good thermal dissipation make the GaN-based diode and transistor a good potential for high frequency and power applications. The other outstanding feature of GaN-based HEMTs is the high electron mobility (1200 cm2/V.s) of the 2-dimensional electron gas (2DEG), formed at the interface between AlGaN and GaN, which leads to a low channel resistance and a high current density. This thesis presents an overview of the most relevant trapping and degradation mechanisms that limit the performance and lifetime of GaN-based transistors for power electronics applications. To that end, pulsed I-V and drain current transient measurements are employed in order to investigate the trapping effects. The degradations of AlGaN/GaN MIS-HEMTs submitted to the gate step-stress experiments are investigated in the first part of this thesis. The results, that are obtained by a combined electrical and optical characterization over the different voltages, are discussed in chapter 2 which indicate the existence of a field- and hot-electron induced phenomena as the AlGaN/GaNMIS-HEMTs degradation mechanism. A specific discussion is devoted to investigate the proton irradiation effect on the dynamic-Ron in HEMTs and is presented in chapter 3. It is shown that the proton irradiation is an effective and controllable method to reduce the dynamic-Ron in AlGaN/GaN HEMTs. Indeed, it is shown that samples that are submitted to a proton irradiation at high fluences (1.5£1014 cm– 2, 3MeV) exhibit a complete suppression of dynamic-Ron (complete voltage range, 150°C). This chapter further continuous to describe the voltage and temperature-dependent pulsed I-V characteristics of 650 V-rated transistors. It also points out the physical origin of dynamic RON in these devices. Furthermore, owing to the positive and stable threshold voltage, the low on-resistance and the high breakdown field, the p-GaN gate GaN-based transistors are commonly accepted as promising devices for application in power converters. To that end, chapter 4 deals with the mechanisms that limit the dynamic performance and the reliability of normally-off GaN-based transistors. This chapter proposed the suppression of threshold voltage instability by a suitable passivation on the p-GaN sidewall. The improved reliability of device highlights that hole trapping mostly takes place on the sidewalls. Finally, in chapter 5, a low leakage current and a state-of-the-art vertical breakdown voltage of above 1400 V a carbon-free GaN-on-Si device are demonstrated. These characteristics are achieved thanks to a thick and excellent crystal quality of GaN buffer. Indeed, low trapping effects are observed all the way to 1200 V with a low dependency of the substrate bias on the current density. The first demonstration of trap-free at such high voltage with this material system, could paves the way for 1200 V applications with GaN-on-Si resulting in a lower Ron and thus higher efficiency as compared to SiC and Si devices

    An analysis of the initiation of upward flashes from tall towers with particular reference to Gaisberg and Säntis towers

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    In this paper, we present an analysis of the lightning events preceding initiation of upward lightning flashes from the Gaisberg and the Säntis Towers. It is found that the majority of upward lightning discharges from both towers are initiated without any preceding lightning activity. We show also that the results of the presented studies on the initiation of upward flashes from tall structures might be affected by the selected parameters of the study, namely the time and distance intervals used to identify the triggering events. Preceding events had the same polarity as triggered flashes in the case of the Säntis Tower and had opposite polarities in the case of the Gaisberg Tower. The effect of seasonal and temperature variations have been also analyzed

    An analysis of the initiation of upward flashes from tall towers with particular reference to Gaisberg and Säntis Towers

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    In this paper, we present an analysis of the lightning events preceding initiation of upward lightning flashes from the Gaisberg and the Santis Towers. It is found that the majority of upward lightning discharges from both towers are initiated without any preceding lightning activity. We show also that the results of the presented studies on the initiation of upward flashes from tall structures might be affected by the selected parameters of the study, namely the time and distance intervals used to identify the triggering events. Preceding events had the same polarity as triggered flashes in the case of the Santis Tower and had opposite polarities in the case of the Gaisberg Tower. The effect of seasonal and temperature variations have been also analyzed. (C) 2015 Elsevier Ltd. All rights reserved

    GaN-based MIS-HEMTs: Impact of cascode-mode high temperature source current stress on NBTI shift

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    This paper reports on the trapping mechanism of GaN-based metal-insulator-semiconductor (MIS) high electron mobility transistors (HEMTs) designed to work in a cascode configuration. We defined a novel stress protocol (High Temperature, Source Current, HTSC) to investigate the degradation processes induced by semi-on state operation. We compare the results of HTSC with those obtained by the standard HTRB (high temperature reverse bias), with the aim of identifying different impact on the RON variation. While HTRB stress results in a strong negative bias/temperature instability (NBTI), under HTSC conditions no significant Vth shift is observed. This result is ascribed to the fact that under HTSC conditions the gate-source voltage difference is significantly smaller than under HTRB, thus having less impact on Vth stability. The technique described in this paper is useful to test the Vth stability of normally-on devices used in cascode configuration

    Reliability and failure analysis in power GaN-HEMTs: An overview

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    ower GaN transistors have recently demonstrated to be excellent devices for application in power electronics. The high breakdown field and the superior mobility of the 2-dimensional electron gas allow to fabricate transistors with low resistive and switching losses, that permit to increase the efficiency of switching mode power converters beyond 99 %. GaN-based transistors are currently supposed to be adopted in KW-range power converters; 650 V transistors are already available on the market, and 1200 V devices are currently under development. During operation, GaN power transistors can reach critical conditions, especially in the off-state (with a high VDS, in excess of 650 V), during hard-switching (where high current and voltage can be simultaneously present), and for high positive gate voltages (in the case of normally-off devices). This paper reports our most recent results on the gradual and catastrophic degradation of GaN-based power HEMTs. We present the results of three different case studies, on: (i) the time-dependent breakdown of power HEMTs submitted to high off-state stress; (ii) the degradation of HEMTs with p-GaN gate submitted to high gate stress; (iii) the hot electron effects in GaN-MISHEMTs submitted to high-Temperature source current stres
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