Molecular communication in fluid media: The additive inverse Gaussian noise channel

We consider molecular communication, with information conveyed in the time of release of molecules. The main contribution of this paper is the development of a theoretical foundation for such a communication system. Specifically, we develop the additive inverse Gaussian (IG) noise channel model: a channel in which the information is corrupted by noise with an inverse Gaussian distribution. We show that such a channel model is appropriate for molecular communication in fluid media - when propagation between transmitter and receiver is governed by Brownian motion and when there is positive drift from transmitter to receiver. Taking advantage of the available literature on the IG distribution, upper and lower bounds on channel capacity are developed, and a maximum likelihood receiver is derived. Theory and simulation results are presented which show that such a channel does not have a single quality measure analogous to signal-to-noise ratio in the AWGN channel. It is also shown that the use of multiple molecules leads to reduced error rate in a manner akin to diversity order in wireless communications. Finally, we discuss some open problems in molecular communications that arise from the IG system model.Comment: 28 pages, 8 figures. Submitted to IEEE Transactions on Information Theory. Corrects minor typos in the first versio

Making linearizability compositional for partially ordered executions

In the interleaving model of concurrency, where events are totally ordered, linearizability is compositional: the composition of two linearizable objects is guaranteed to be linearizable. However, linearizability is not compositional when events are only partially ordered, as in the weak-memory models that describe multicore memory systems. In this paper, we present a generalisation of linearizability for concurrent objects implemented in weak-memory models. We abstract from the details of specific memory models by defining our condition using Lamport’s execution structures. We apply our condition to the C11 memory model, providing a correctness condition for C11 objects. We develop a proof method for verifying objects implemented in C11 and related models. Our method is an adaptation of simulation-based methods, but in contrast to other such methods, it does not require that the implementation totally orders its events. We apply our proof technique and show correctness of the Treiber stack that blocks on empty, annotated with C11 release-acquire synchronisation

Parallel Programming Must Be Deterministic By Default

We examine the problem of providing a parallel programming model that guarantees deterministic semantics. We propose a research agenda focusing on the following questions: 1. How to guarantee determinism in a modern object-oriented language; 2. How to provide sound guarantees when parts of the program either cannot be proved deterministic or have "harmless" nondeterminism; 3. How to specify explicit non-determinism when needed; and 4. How to make it easier to port programs to the language

Understanding the Propagation of Hard Errors to Software and its Implications for Resilient System Design

With continued CMOS scaling, future shipped hardware will be increasingly vulnerable to in-the-field faults. To be broadly deployable, the hardware reliability solution must incur low overheads, precluding use of expensive redundancy. We explore a co-designed hardware-software solution that treats most hardware faults as software bugs and leverages common mechanisms for hardware and software reliability, thereby amortizing some of the overhead. Fundamental to such a solution is a characterization of how hardware faults in different microarchitectural structures of a modern processor propagate through the application and OS. This paper aims to provide such a characterization, identify low-cost detection methods to intercept fault propagation, and to provide guidelines for a complete co-designed reliability solution. We focus on hard faults because they are increasingly important and have different system implications than the much studied transients. We achieve our goals through fault injection experiments with a microarchitecture level full system timing simulator

Comparing and Combining Read Miss Clustering and Software Prefetching

Conference paperNon