Symbolic Extraction for Estimating Analog Layout Parasitics in Layout-Aware Synthesis

This paper presents a new layout parasitics extraction paradigm, symbolic extraction, for use in layout-aware analog synthesis methodologies. Unlike traditional post-layout extraction, symbolic extraction extracts layout parasitics in symbolic form from parameterized layouts. As a result, parasitic values can be calculated directly from given circuit and layout parameters. In layout-aware circuit synthesis process, tasks of time-consuming layout re-gerenarion and re-extraction can be replaced by this fast parasitics calculation step. In the paper, we discuss how to integrate symbolic extraction into the existing analog design flow and how symbolic extraction can be implemented

Towards Reduced-Order Models for Online Motion Planning and Control of UAVs in the Presence of Wind

Abstract This paper describes a model reduction strategy for obtaining a computationally efficient prediction of a fixed-wing UAV performing waypoint navigation under steady wind conditions. The strategy relies on the off-line generation of time parametrized trajectory libraries for a set of flight conditions and reduced order basis functions functions for determining intermediate locations. It is assumed that the UAV has independent bounded control over the airspeed and altitude, and consider a 2D slice of the operating environment. We found that the reduced-order model finds intermediate positions within 10% and at speeds of 10x faster than clock-time (even in wind conditions in excess of 50% of the UAV's forward airspeed) when compared against simulation results using a medium-fidelity flight dynamics model. The potential of this strategy for online planning operations is highlighted

Experimental investigation of interface states and photovoltaic effects on the scanning capacitance microscopy measurement for p-n junction dopant profiling

Controlled polishing procedures were used to produce both uniformly doped and p-n junction silicon samples with different interface state densities but identical oxide thicknesses. Using these samples, the effects of interface states on scanning capacitance microscopy (SCM) measurements could be singled out. SCM measurements on the junction samples were performed with and without illumination from the atomic force microscopy laser. Both the interface charges and the illumination were seen to affect the SCM signal near p-n junctions significantly. SCM p-n junction dopant profiling can be achieved by avoiding or correctly modeling these two factors in the experiment and in the simulation. (c) 2005 American Institute of Physics

COVID-19 vaccine-associated myocarditis: Analysis of the suspected cases reported to the EudraVigilance and a systematic review of the published literature

BACKGROUND: Myocarditis secondary to Coronavirus Disease 2019 (COVID-19) vaccination has been reported in the literature. OBJECTIVE: This study aimed to characterize the reported cases of myocarditis after COVID-19 vaccination based on age, gender, doses, and vaccine type from published literature and the EudraVigilance database. METHODS: We performed an analysis in the EudraVigilance database (until December 18, 2021) and a systematic review of published literature for reported cases of suspected myocarditis and pericarditis (until 30th June 2022) after the COVID-19 vaccination. RESULTS: EudraVigilance database analysis revealed 16,514 reported cases of myocarditis or pericarditis due to the vaccination with COVID-19 vaccines. The cases of myo- or pericarditis were reported predominantly in the age group of 18-64 (n = 12,214), and in males with a male-to-female (M: F) ratio of 1.7:1. The mortality among myocarditis patients was low, with 128 deaths (2 cases per 10.000.000 administered doses) being reported. For the systematic review, 72 studies with 1026 cases of myocarditis due to the vaccination with COVID-19 vaccines were included. The analysis of published cases has revealed that the male gender was primarily affected with myocarditis post-COVID-vaccination. The median (IQR) age of the myocarditis cases was 24.6 [19.5-34.6] years, according to the systematic review of the literature. Myocarditis cases were most frequently published after the vaccination with m-RNA vaccines and after the second vaccination dose. The overall mortality of published cases was low (n = 5). CONCLUSION: Myocarditis is a rare serious adverse event associated with a COVID-19 vaccination. With early recognition and management, the prognosis of COVID-19 vaccine-induced myocarditis is favorable

Mixed-signals design automation using the MIX-SYN Framework

This paper demonstrates how the MIX-SYN Framework can fast-track the design of analogue and mixed-signals integrated circuits, traditionally designed using time-consuming techniques. By integrating different levels of design abstraction and their simulation environments, MIX-SYN aims to bridge the existing design discontinuity of transferring algorithm to functional design, It does not perform general analogue synthesis, but uses a mix of knowledge-based and analytic-based approaches to help the designer rapidly explore the design space and arrive at a circuit solution

Rachael SPARC: An open source 32-bit microprocessor core for SoCs

SoC design methodology is totally dependent on the availability of reliable, easily interfaced and well supported IP cores. Complex cores such as microprocessors can be very expensive if licenced from commercial providers. Research projects, and even small companies, look for open source cores despite the problems associated with this source. The Rachael embedded processor discussed in this paper is a result of an open source initiative, supported both by a commercial design Arm and a university. The processor is based on the proven SPARC architecture and was developed in Verilog with systematic methodology as used in industry. Rachael has a flexible memory architecture and is interfaced to the AMBA on chip bus. It is supported by a suite of development tools and is made available as an open source core. Rachel was extensively tested on Virtex4, an earlier version was used in a commercial chip, and a full version is to be fabricated. We discuss architectural issues and trade-offs in the design of Rachael, present its architecture, and analyse performance factors. The Verilog pre-processor developed for the project is briefly introduced. The open source project is presented and analysed from both the university and industry perspectives. Rachael runs at speed on Xilinx's ML401 board and it can be demonstrated executing various software applications