Multi-phase-field analysis of short-range forces between diffuse interfaces

We characterize both analytically and numerically short-range forces between spatially diffuse interfaces in multi-phase-field models of polycrystalline materials. During late-stage solidification, crystal-melt interfaces may attract or repel each other depending on the degree of misorientation between impinging grains, temperature, composition, and stress. To characterize this interaction, we map the multi-phase-field equations for stationary interfaces to a multi-dimensional classical mechanical scattering problem. From the solution of this problem, we derive asymptotic forms for short-range forces between interfaces for distances larger than the interface thickness. The results show that forces are always attractive for traditional models where each phase-field represents the phase fraction of a given grain. Those predictions are validated by numerical computations of forces for all distances. Based on insights from the scattering problem, we propose a new multi-phase-field formulation that can describe both attractive and repulsive forces in real systems. This model is then used to investigate the influence of solute addition and a uniaxial stress perpendicular to the interface. Solute addition leads to bistability of different interfacial equilibrium states, with the temperature range of bistability increasing with strength of partitioning. Stress in turn, is shown to be equivalent to a temperature change through a standard Clausius-Clapeyron relation. The implications of those results for understanding grain boundary premelting are discussed.Comment: 24 pages, 28 figure

Depletion-Isolation Effect in Vertical MOSFETs During the Transition From Partial to Fully Depleted Operation

A simulation study is made of floating-body effects (FBEs) in vertical MOSFETs due to depletion isolation as the pillar thickness is reduced from 200 to 10 nm. For pillar thicknesses between 200–60 nm, the output characteristics with and without impact ionization are identical at a low drain bias and then diverge at a high drain bias. The critical drain bias Vdc for which the increased drain–current is observed is found to decrease with a reduction in pillar thickness. This is explained by the onset of FBEs at progressively lower values of the drain bias due to the merging of the drain depletion regions at the bottom of the pillar (depletion isolation). For pillar thicknesses between 60–10 nm, the output characteristics show the opposite behavior, namely, the critical drain bias increases with a reduction in pillar thickness. This is explained by a reduction in the severity of the FBEs due to the drain debiasing effect caused by the elevated body potential. Both depletion isolation and gate–gate coupling contribute to the drain–current for pillar thicknesses between 100–40 nm

Analisis Pembentukan Uni Moneter Asean-5 Dengan Pendekatan Paritas Internasional Dalam Hubungan Keseimbangan Nilai Tukar Jangka Panjang (1980.01 – 2004.12)

In order to strengthening cooperation regional and form the strength regional in ASEAN, likely require to relate at successful European Union in forming financial and economic market integration (EMU). ME become the “model" a success economic integration. We can conclude that to reach monetary union have to beforehand realized by economic union supported by union and strong politics willingness, where this matter have been blazed the way old in such a way by leaders of European countries of West which is merged into EMU. Intention of this research is to see the International parity condition of Purchasing Power Parity (PPP) and rate of interest parity (UIP) of among currency in ASEAN-5 with the currency of United States. Result of this research obtained is show that the goodness of theory of Purchasing Power Parity (PPP) and rate of interest parity (UIP) cannot be holded for the nations of ASEAN-5. In general, hypothesis ß 1=1 refused by existing data. This fact is indication that PPP and UIP cannot be holded during period 1980.01 until 2004.12. With do not hold of two the parity (PPP and UIP) hence possibility to existing of monetary uni ASEAN likely still will passing sufficient process

Exploiting the Synergy Between Gossiping and Structured Overlays

In this position paper we argue for exploiting the synergy between gossip-based algorithms and structured overlay networks (SON). These two strands of research have both aimed at building fault-tolerant, dynamic, self-managing, and large-scale distributed systems. Despite the common goals, the two areas have, however, been relatively isolated. We focus on three problem domains where there is an untapped potential of using gossiping combined with SONs. We argue for applying gossip-based membership for ring-based SONs---such as Chord and Bamboo---to make them handle partition mergers and loopy networks. We argue that small world SONs---such as Accordion and Mercury---are specifically well-suited for gossip-based membership management. The benefits would be better graph-theoretic properties. Finally, we argue that gossip-based algorithms could use the overlay constructed by SONs. For example, many unreliable broadcast algorithms for SONs could be augmented with anti-entropy protocols. Similarly, gossip-based aggregation could be used in SONs for network size estimation and load-balancing purposes

Improved drive current in RF vertical MOSFETS using hydrogen anneal

This letter reports a study on the effect of a hydrogen anneal after silicon pillar etch of surround-gate vertical MOSFETs intended for RF applications. A hydrogen anneal at 800 ?C is shown to give a 30% improvement in the drive current of 120-nm n-channel transistors compared with transistors without the hydrogen anneal. The value of drive current achieved is 250 ?A/?m, which is a record for thick pillar vertical MOSFETs. This improved performance is obtained even though a sacrificial oxidation was performed prior to the hydrogen anneal to smooth the pillar sidewall. The values of subthreshold slope and DIBL are 79 mV/decade and 45 mV/V, respectively, which are significantly better than most values reported in the literature for comparable devices. The H2 anneal is also shown to decrease the OFF-state leakage current by a factor of three

Precision microwave dielectric and magnetic susceptibility measurements of correlated electronic materials using superconducting cavities

We analyze microwave cavity perturbation methods, and show that the technique is an excellent, precision method to study the dynamic magnetic and dielectric response in the $GHz$ frequency range. Using superconducting cavities, we obtain exceptionally high precision and sensitivity for measurements of relative changes. A dynamic electromagnetic susceptibility $\tilde{\zeta}(T)=\zeta ^{\prime}+i\zeta ^{\prime \prime}$ is introduced, which is obtained from the measured parameters: the shift of cavity resonant frequency $\delta f$ and quality factor $Q$. We focus on the case of a spherical sample placed at the center of a cylindrical cavity resonant in the $TE_{011}$ mode. Depending on the sample characteristics, the magnetic permeability $\tilde{\mu}$, the dielectric permittivity $\tilde{\epsilon}$ and the complex conductivity $\tilde{\sigma}$ can be extracted from $\tilde{\zeta}_{H}$. A full spherical wave analysis of the cavity perturbation is given. This analysis has led to the observation of new phenomena in novel low dimensional materials.Comment: 16 pages, 5 figure

Self-aligned silicidation of surround gate vertical MOSFETs for low cost RF applications

We report for the first time a CMOS-compatible silicidation technology for surround-gate vertical MOSFETs. The technology uses a double spacer comprising a polysilicon spacer for the surround gate and a nitride spacer for silicidation and is successfully integrated with a Fillet Local OXidation (FILOX) process, which thereby delivers low overlap capacitance and high drive-current vertical devices. Silicided 80-nm vertical n-channel devices fabricated using 0.5-?m lithography are compared with nonsilicided devices. A source–drain (S/D) activation anneal of 30 s at 1100 ?C is shown to deliver a channel length of 80 nm, and the silicidation gives a 60% improvement in drive current in comparison with nonsilicided devices. The silicided devices exhibit a subthreshold slope (S) of 87 mV/dec and a drain-induced barrier lowering (DIBL) of 80 mV/V, compared with 86 mV/dec and 60 mV/V for nonsilicided devices. S-parameter measurements on the 80-nm vertical nMOS devices give an fT of 20 GHz, which is approximately two times higher than expected for comparable lateral MOSFETs fabricated using the same 0.5-?m lithography. Issues associated with silicidation down the pillar sidewall are investigated by reducing the activation anneal time to bring the silicided region closer to the p-n junction at the top of the pillar. In this situation, nonlinear transistor turn-on is observed in drain-on-top operation and dramatically degraded drive current in source-on-top operation. This behavior is interpreted using mixed-mode simulations, which show that a Schottky contact is formed around the perimeter of the pillar when the silicided contact penetrates too close to the top S/D junction down the side of the pillar

Industri Perbankan Indonesia Periode 2001-2014: Deteksi Konsentrasi Pasar dan Prestasi Alma

This descriptive study aims to explain the condition of credits market and deposit market of Indonesian banking in the period of 2001-2014 includes the achievement of ALMA and CAMEL based on the secondary data and financial statements of 97 Indonesian banks. This graph result and tabulation and financial ratio show the information that Indonesian banking market is in the competitive condition (CR4 index and HHI index decrease and the market is classified in loose oligopoly condition), however all main variables of ALMA show the high ranking