A Powerful Optimization Tool for Analog Integrated Circuits Design

This paper presents a new optimization tool for analog circuit design. Proposed tool is based on the robust version of the differential evolution optimization method. Corners of technology, temperature, voltage and current supplies are taken into account during the optimization. That ensures robust resulting circuits. Those circuits usually do not need any schematic change and are ready for the layout.. The newly developed tool is implemented directly to the Cadence design environment to achieve very short setup time of the optimization task. The design automation procedure was enhanced by optimization watchdog feature. It was created to control optimization progress and moreover to reduce the search space to produce better design in shorter time. The optimization algorithm presented in this paper was successfully tested on several design examples

Test platform for analog integrated circuits

Aquest informe explica la metodologia utilitzada per al desenvolupament d'una plataforma de proves per a circuits integrats. Inclou quatre fonts de tensió programables amb una tensió de sortida màxima de 4.095 V, i quatre fonts de corrent programables (desenvolupades amb fonts de corrent Howland) amb un màxim de 4.095 μA. La font de corrent inclou un límit de tensió de sortida programable. La plataforma també inclou una opció de comunicació serial de 16 bits per interactuar amb components digitals. Es pot accedir a les funcionalitats de la plataforma mitjançant una interfície gràfica d'usuari, i cal connectar la placa a una Raspberry Pi. Totes les fonts de tensió i de corrent van ser sotmeses a proves de fiabilitat i precisió, i els resultats mostren un funcionament fiable (dins certs límits per a la font de corrent). Les fonts de tensió van presentar un error màxim de ±10 mV, considerat acceptable ateses les especificacions del fabricant dels components utilitzats. La font de corrent va presentar un error màxim de 30 nA, considerat una mica elevat. Es recomana fer més proves amb totes les fonts, especialment amb les de corrent. Les limitacions a l'avaluació del producte es van imposar per la disponibilitat dels equips.El presente informe explica la metodología utilizada para el desarrollo de una plataforma de pruebas para circuitos integrados. Incluye cuatro fuentes de tensión programables con una tensión de salida máxima de 4.095 V, y cuatro fuentes de corriente programables (desarrolladas con fuentes de corriente Howland) con un máximo de 4.095 μA. La fuente de corriente incluye un límite de tensión de salida programable. La plataforma también incluye una opción de comunicación serial de 16 bits para interactuar con componentes digitales. Se puede acceder a las funcionalidades de la plataforma a través de una interfaz gráfica de usuario, y es necesario conectar la placa a una Raspberry Pi. Todas las fuentes de tensión y de corriente fueron sometidas a pruebas de fiabilidad y precisión, y los resultados muestran un funcionamiento fiable (dentro de ciertos límites para la fuente de corriente). Las fuentes de tensión presentaron un error máximo de ±10 mV, considerado aceptable dadas las especificaciones del fabricante de los componentes utilizados. La fuente de corriente presentó un error máximo de 30 nA, considerado un poco elevado. Se recomienda realizar más pruebas con todas las fuentes, especialmente con las de corriente. Las limitaciones a la evaluación del producto fueron impuestas por la disponibilidad de los equipos.The present report explains the methodology used for the development of a test platform for integrated circuits. It includes four programmable voltage sources with a maximum output voltage of 4.095 V, and four programmable current sources (developed using Howland current sources) with a maximum of 4.095 μA. The current source includes a programmable voltage compliance. The platform also includes a 16-bit serial communication option to interact with digital components. The platform capabilities can be accessed through a Graphical User Interface, and the board needs to be connected to a Raspberry Pi. All voltage and current sources were tested for reliability and accuracy, and the results show reliable functioning (within certain limits for the current source). The voltage sources presented a maximum error of ±10 mV, considered acceptable given the manufacturer specifications of the used components. The current source showed a maximum error of 30 nA, considered a bit high. Further testing is recommended for all the sources, especially the current sources. Limitations to the evaluation of the product were imposed by the availability of equipment.Incomin

Efficient symbolic computation of approximated small-signal characteristics of analog integrated circuits

A symbolic analysis tool is presented that generates simplified symbolic expressions for the small-signal characteristics of large analog integrated circuits. The expressions are approximated while they are computed, so that only those terms are generated which remain in the final expression. This principle causes drastic savings in CPU time and memory, compared with previous symbolic analysis tools. In this way, the maximum size of circuits that can be analyzed, is largely increased. By taking into account a range for the value of a circuit parameter rather than one single number, the generated expressions are also more generally valid. Mismatch handling is explicitly taken into account in the algorithm. The capabilities of the new tool are illustrated with several experimental result

An advanced symbolic analyzer for the automatic generation of analog circuit design equations

A tool for symbolic analysis of analog integrated circuits is presented featuring accurate simplification, pole/zero extraction, and tools for parametric AC circuit characterization. The program, called ASAP, uses signal flowgraph methods and has been written in C for portability. In its current version, ASAP is able to deal with the complexity levels arising in typical analog building blocks when described by device-level models. The ASAP inputs and outputs, the architecture, and the graphical interface are discussed

O-MOORE-NICE!: new methodologies and algorithms for design and simulation of analog integrated circuits

No abstract

Nonlinear time-domain macromodeling of OTA circuits

The authors present an accurate nonlinear macromodel of the operational transconductance amplifier (OTA) which is suitable for the transient simulation of OTA-based CMOS analog integrated circuits. As compared to device-level OTA models, the proposed macromodel is advantageous in terms of CPU time. Also, in circuits with many OTAs, it does not have the problems of convergence that the device-level MODEL has. All the macromodel parameters can be calculated from measurements made at the OTA terminals. Experimental results from a 3-μm CMOS OTA prototype as well as simulation results from device-level models are included and compared to simulation results from the macromodel

Symbolic analysis tools-the state of the art

This paper reviews the main last generation symbolic analyzers, comparing them in terms of functionality, pointing out also their shortcomings. The state of the art in this field is also studied, pointing out directions for future research