The authors present an accurate nonlinear macromodel of the operational transconductance amplifier (OTA) which is suitable for the transient simulation of OTA-based CMOS analog integrated circuits. As compared to device-level OTA models, the proposed macromodel is advantageous in terms of CPU time. Also, in circuits with many OTAs, it does not have the problems of convergence that the device-level MODEL has. All the macromodel parameters can be calculated from measurements made at the OTA terminals. Experimental results from a 3-μm CMOS OTA prototype as well as simulation results from device-level models are included and compared to simulation results from the macromodel

Cruz Moreno, J.

Huertas Díaz, José Luis

Linares Barranco, Bernabé

Pérez Verdú, Belén

Rodríguez Vázquez, Ángel Benito

Sánchez Sinencio, Edgar

English

idUS. Depósito de Investigación Universidad de Sevilla

NONLINEAR TIME-DOMAIN MACROMODELING O F  OTA CIKCUITS B. Perez-Verdu t, J. Cruz 7, B. Linares-Barranco tS, A. Rodriguez-Vazquez t, J.L. Huertas t and E. Sanchez-Sinencio $ tDto. Electr6nica y Electromagnetismo, Universidad de Sevilla. 41012-Sevilla. SPAIN #Texas A&M Univemty, Dept. of Electrical Engineering, College Station, TX 77843, USA ABSTRACT aper we present an accurate nonlinear macromode: of the OTA which is  suitable for the transient simulation of OTA-based CMOS analog integrated circuits. As compared to device-level OTA models, the proposed macromodel is advanta eous in terms of CPU time. Besides, in circuits wit% many OTAs, it does not have the problems of convergence tha t  the device-level has. All the macromodel parameters can be calculated from measurements made at the OTA terminals. Experimental results from a 3pm CMOS OTA prototype as well as simulation results from device-level models are included and compared to simulation results from the macromodel. In this INTRODUCTION For many years  t h e  convent ional  vol tage V a l  Amplifier (opamp) has been the workhorse or analog circuit design. Recently, the 0 erational Transconductance Amplifier ( 0 T A ) j a s  been aemonstrated to be posntially advantageous for the synthesis of high-frequency analog building blocks [ l -  41. One reason for this is that  transconductance am lifiers do not have any high internal impedance nofe, hence not requiring internal compensation capacitors and thereby yielding larger bandwidths that the opamp. Another appealing feature of the OTA is that  its transconductance gain can be externally controlled,  t he reby  al lowing programmable  applications. These previous features have motivated an  interest in the application of the OTA for the synthesis of continuous-time analog circuits, either for linear [5,61 or for nonlinear [7,81 a plications. These efforts run parallel to the proposal of new CMOS OTA implementations that are capable of linear operation in larger input voltage ranges [1,3,4,9]. The ultimate goal is the implementation of high-fre uency continuous- time analog circuits in fully monoli%ic form. The design of integrated circuits rely on the efficient use of an appropriate set of CAD tools. In particular, electrical simulation tools (like SPICE21 are essential for the design of analog integrated circuits. Although electrical simulation can be done using device-level models, resorting to macromodels is a common strategy to reduce the CPU-time re uired in simulating complex analog systems. Several opamp macromodels have been reported in the past (see references in [lo]). However, little have been still done about OTA macromodeling, the few contributinns 1441 ISCAS '89 existing [11,121 not being specifically focused on the inclusion of the macromodel in a electrical simulation tool. It restricts our ability to properly analyze complex OTA-based analog integrated circuits. In this paper we overcome this drawback by presenting a n  OTA macromodel which is suitable for the time-domain simulation of OTA-based CMOS analog circuits. OTA MACROMODEL OTA specifications and parameters Figure 1 shows a generic CMOS OTA architecture consisting of an input transconductance stage followed by current mirrors 121. The input stage performs the core operation of differential-voltage to current  conversion while the current mirrors are used to steer the output currents of the differential amplifier to a high impedance output node. Several types of current mirrors [131 and transconductance sta es [1,3,4,91 can be used in Fig.1, thereby resulting in a t road  catalog of practical OTA implementations. I ESPEJOS P I Figure 1: Generic CMOS OTA block diagram The ideal model of Fig.1 is a linear differential- voltage-controlled current-source, the only parameter required to describe this ideal model being the DC transconductance gain of the OTA, g,. The behavior of practical OTAs deviate from what is expected using the ideal model in different ways. In the following there is a list of the parameters and specifications to be considered in the proposed macromodel. DC small-signal OTA transconductance gain e Inputca acitance V,, Input regrred offset voltage CH2692-2/89/0000-1441 $1.00 0 1989 IEEE rurtiicr imvrrnarivn can ~e mraineu morn ut-. w.  hennern JenKins. -~ (217) 333-4789 Linear region (less than 1% deviation) for the voltage to current conversion Nonsaturated region for the voltage to current conversion Maximum output current Minimum output current High-frequency pole Maximum output voltage Minimum output voltage Delay for the top voltage-saturation state Delay for the bottom voltage-saturation state Minimum output current in the top voltage- saturation state Maximum output current in the bottom voltage-saturation state Output Resistance Output Capacitance Each parameter above is directly related to the corresponding OTA specification and can be calculated from external measurements a t  the OTA terminals. Macromodel architecture Figure 2 shows the block diagram of the proposed macromodel consisting of four stages. The different stages are connected by voltage-controlled sources. v , A ~ \ A  stage lntermedia stag  Figure 2: Macromodel architecture All the nonlinearities in  the macromodel a re  implemented using analog switches, as i t  is done in [ 101 for the opamp. The control stage in Fig.2 generates the threshold signals required for controlling the analog switches. The input stage includes the input impedance ,  of fse t  vo l t age  a n d  C M R R .  I t s  implementation is similar to the corresponding stage in [lo]. Figure 3a shows the implementation of t h e  intermediate stage. The conditions for each analog switch to be at the position 0 are given in the first row of Table 1; the correspondin conditions for the position 0 are included in the seconirow. The intermediate stage is driven by the output voltage of the input stage,V,, and develops an output voltage Vb. Analysis gives the following dynamic equation to describe the input-output operation of Fig.3a: d V b  ' b  c - + -  = I ( V  ) I dt H ,  where I ( V J  is the nonlinear function depicted in Fig.3b. When particularized for small-signal, this  equation accounts for the DC transconductance gain (parameter gml in the list above) also providing a sin le ole approach [2] to the hi h frequenc behavior of &e 'BTA (parameter o1 =I/R, f ! , i  The nonsnearities in the OTA voltage to current conversion are modeled by the transfer characteristics of Fig.3b (via the parameters I H + ,  1 8 - ,  8 ,  -, S l + , 8 2 - ,  &+) .  t I(",) 3a 3b Figure 3: a)Intermediate stage, b)DC OTA transfer characteristic Table 1: Switching conditions for Pig.3a (Zb= V d R , )  The out ut  stage is shown in Fig.4. The switching conditions &r the analog switches used in this stage are given in  Table 2. As for Table 1, the  f i rs t  row corresponds to the position 0. Besides, the switches LS and L I Z  exhibit a controlable delay in the 0 to 0 transition. + -  Figure 4: Output stage The output stage is driven by the output voltage of the intermediate stage, v b ,  and models the output impedance and  the  output  voltage sa tura t ion  1442 characteristics, including the limitations on the available current when the output voltage is a t  saturation, and the time delays appearing when the OTA is driven out of the voltage saturation states (parameters Is-, Is+,TD- and TD+). V , > E g +  V.,>Es+ Vu<&- V,,<Is- l b < I o  ls-<Io 1b>I0 I s+>Io  Table 2 Switching conditions for Fig.4 (I*& VdRI)  Most of the element values of the macromodel can be directly calculated from measurements. R P  is included to avoid the current sources from being in open circuit a t  any time and must be selected large enough. MACROMODEL PERFORMANCE Figure 5 is a microphotogra h of a CMOS 3pm double metal prototype of the &'A architecture of Fig.1, where we have used enhanced Wilson current mirrors [ 131 and the extended-range differential amplifier of Fig.6 [l]. Figure 5 CMOS 3pm O r A  prototype 1 1 Figure 6: Linearized differential pair  I1 I Different measurements have been made on the test circuit of Fig.'la, where the rototype of Fig.5 is connected to several ancillary ogchip com Figures 8a,c show two osciloscope d i s p c z E t m  the test  circuits of Fig.7a. Figures  8b,d show t h e  corresponding waveforms obtained by simulation using DIANA [14] and the OTA macromodel. Figures 8a.b are for C,, = 33pF, GI. = 1 l R ~  = 0, the signal driving the test circuit being a 5Khz sinusoidal waveform.On the 1443 other hand, Figs.8c,d are for CL = 200pF, RL = 212KQ and a square input signal. 7a 7b  Figure 7: Tests circuits f R u  = 50KQ) 8a n E a- !4 s- 0 5 E 4 P - 0 5 In . .  1 . . . . 1 . . . . 1 . . . . 1  8d ' ' 7 ~ 1 0 - ~  8~10'~ 9~10'~ lo5 Figure 8: Experimental versus simulated waves ~ ~ _ _ ~  ~ rurtiicr imvrrnarivn can ~e mraineu morn ut-. w. hennern JenKins. -~ (217) 333-4789 Previous figures shows a very close agreement between experimental and simulation results. The overshoots in the experimental waveforms are due to the reactive behavior of the experimental setup. The performance of the new macromodel has been also compared to that of device-level models. B the way of example, Fig.9a shows several wave&rms obtained when simulating the test circuit of Fig.7b by us ing  SPICE2 a n d  device- level  models. T h e  corresponding results when using our macromodel in DIANA are shown in Fig.9b. The OTAs for this example used a conventional noncompensated differential amplifier and enhanced Wilson current mirrors. As i t  can be seen, the agreement between the macromodel and the device-level model is very good. However, the former is much more efficient in terms of CPU-time than the latter. Concerning this point, our experience for this and many other examples and simulation runs gives a ratio n=TdTr which ranges between 4 and 30, where TD is the CPU-time for the device-level model and T, is the corresponding time for the macromodel. n 9b  Figure 9 Simulation results for Pig.7b a )  Device-level model, b) Macromodel voltages:O.lvoltsldv; currents 10pA/dv 1)lSCUSSION OF HESULTS A macromodel for the OTA has been presented whose features can be summarized in the following points: 1) It is a large signal nonlinear macromodel. 2) It models the input-output behavior of the OTA, t h u s  being adequate  for d i f f e ren t  OTA implementations (for instance, two different OTAs a r e  considered in  t h e  sect ion on macromodel performance). 3) All the nonlinearities in the new macromodel are simulated using threshold functions [lo]. 4) The macromodel parameters can be calculated from measurements made a t  the OTA terminals. 5 )  I t  yields reasonably accurate simulations, providing important advantages in terms of CPU-time saving. 6) Besides the reduced CPU-time, the macromodel in circuits with many OTAs does not have the serious problem of convergence (in SPICES) that the device-level model has. Future research will focus on the input stage and common mode effects. Also, a classification of a large catalog of OTA architectures will be done. Finally, frequency-domain macromodels will be developped. REFERENCES 111 I21 [31 141 I51 161 171 [SI [91 I101 1111 I121 1131 1141 A. Nedungadi and  R. L. Geiger: "High- Frequency Voltage Controlled Continuous Time Low-Pass Fi l ter  using Linearized CMOS Integrators". Electronic Letters, vol 22, pp 729- 731, June 1986. K. D. Peterson e t  al.: "Amplifier Design Considerations for High Frequency Monolithic Filters". Proceedings of the 1987 European Conference on Circuit Theory and Design, pp 321-326. September 1987. C. S. Park and R. Schaumann:"Design of a 4- Mhz Analog  i n t e g r a t e d  CMOS Transconductance-C Bandpass Filter". IEEE Journal of Solid-State Circuits, vol SC-23, pp 987-996, August 1988. F. Krummenacher and N. Joe1:"A 4-Mhz CMOS Continuous-Tim; F i l t e r  w i t h  O n - C h i p  Automatic Tunin IIEEE Journal of Solid- State Circuits, vol Ed-23, pp742-749, June 1988. R. L. Geiger and E. Shchez-Sinencio:"Active Filter Design Using OTAs: A Tutorial". IEEE Circuits and Devices Magazine, vol 1, pp 20-32, March 1985. . . E. Sanchez-Sinencio e t  al.:"Generation of Continuous-Time Two Integrator Loop OTA Filter Structure". IEEE Trans. Circuits and  Systems, vol CAS-35, pp 936-946, August 1988. A. Rodriguez Vaz uez et al.: "On the Design of Cuasi-Sinusoidal8scillators usine OTAs". IEEE Trans. Circuits and Systems, to bepublished. J. Silva-Martinez and E. Shchez-Sinencio: "Analogue OTA Multiplier without Inpu t  Voltage Swing Restrictions, and Temperature Compensated". Electronic Letters, vol22, pp 599- 600, May 1986. R. R. Torrance et  al.: "CMOS Voltage to Current Transducers". I E E E  Trans.  Circuits a n d  Systems, vol CAS-32, pp 1097-1104, Nov 1985. B. Perez-Verdu et  al.:"A New Nonlinear Time- Domain Op-Amp Macromodel Using Threshold Functions and Digitally Controled Network Elements". I E E E  J o u r n a l  of Sol id-State  Circuits, vol SC-23, pp 959-971, August 1988. M. J. Ogorzalek and A. R. Scibich: "Improved Macromodel of Operational Transconductance Amplifier (OTA)". Proceedrngs of the 1984 IEEEIISCAS, pp 1474-1476, May 1984. W. M. C. Sansen et  al.: 'Transient Analysis of Charge Transfer in SC Filters-Gain Error and Distortion". IEEE Journa l  of Solid -State  Circuits, vol SC-22. pp 268-276, April 1986. P.E. Allen and D. Holdberg: "CMOS Analog Circuit Design". Holt, Rinehart & Winston 1987. G. Arnout et  al. "DIANA V7E user's guide". ESAT Laboratory, Katholieke Universiteit  Leuven, 1983. 1444 

Nonlinear time-domain macromodeling of OTA circuits

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Nonlinear time-domain macromodeling of OTA circuits

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