5 research outputs found

    Analog CMOS implementation of cellular neural networks

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    Cataloged from PDF version of article.The analog CMOS circuit realization of cellular neural networks with transconductance elements is presented. This realization can be easily adapted to various types of applications in image processing just by choosing the appropriate transconductance parameters according to the predetermined coefficients. The effectiveness of the designed circuits for connected component detection is shown by HSPICE simulations. For 'fixed function' cellular neural network circuits the number of transistors are reduced further by using multi-input transconductance elements

    Design of Building Blocks for Trit Algorithm

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    This thesis attempts to design the building blocks for TRIT algorithm. PSPICE was used for simulation. The building blocks were laidout in Magic.Electrical Engineerin

    Vlsi Implementation of Olfactory Cortex Model

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    This thesis attempts to implement the building blocks required for the realization of the biologically motivated olfactory neural model in silicon as the special purpose hardware. The olfactory model is originally developed by R. Granger, G. Lynch, and Ambros-Ingerson. CMOS analog integrated circuits were used for this purpose. All of the building blocks were fabricated using the MOSIS service and tested at our site. The results of this study can be used to realize a system level integration of the olfactory model.Electrical Engineerin

    VLSI Technologies for Artificial Neural Networks

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    Goser K, Hilleringmann U, Rückert U, Schumacher K. VLSI Technologies for Artificial Neural Networks. IEEE Micro. 1989;9(6):28-44.VLSI systems, basic integrated circuits, and silicon technologies are discussed. Novel circuit and design principles that provide a foundation for the implementation of a wide variety of neural network models in silicon are described. The key issues for a successful integration of neural systems are identified. The realization of algorithms in silicon is examined. Special-purpose hardware for carrying out the activation and transfer function and for the connection elements is discussed. A brief overview of the current silicon technologies is provided
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