68 research outputs found
Rail-to-rail class AB CMOS tunable transconductor with -52dB IM3 at 1MHz
A novel CMOS tunable transconductor is presented.
The circuit operates in classAB hence featuring power efficiency.
The internal feedback employed and the use of a linearized triode
transistor for voltage-to-current conversion allows achieving high
linearity. Rail-to-rail input range is obtained by using floatinggate
transistors. Measurement results for a test chip prototype in
a 0.5”m standard CMOS process show an IM3 of -52.13dB at
1MHz for a 2Vpp input and a power consumption of 2.2mW
Low-Voltage Ultra-Low-Power Current Conveyor Based on Quasi-Floating Gate Transistors
The field of low-voltage low-power CMOS technology has grown rapidly in recent years; it is an essential prerequisite particularly for portable electronic equipment and implantable medical devices due to its influence on battery lifetime. Recently, significant improvements in implementing circuits working in the low-voltage low-power area have been achieved, but circuit designers face severe challenges when trying to improve or even maintain the circuit performance with reduced supply voltage. In this paper, a low-voltage ultra-low-power current conveyor second generation CCII based on quasi-floating gate transistors is presented. The proposed circuit operates at a very low supply voltage of only ±0.4 V with rail-to-rail voltage swing capability and a total quiescent power consumption of mere 9.5 ”W. Further, the proposed circuit is not only able to process the AC signal as it's usual at quasi-floating gate transistors but also the DC which extends the applicability of the proposed circuit. In conclusion, an application example of the current-mode quadrature oscillator is presented. PSpice simulation results using the 0.18 ”m TSMC CMOS technology are included to confirm the attractive properties of the proposed circuit
A Survey of Non-conventional Techniques for Low-voltage Low-power Analog Circuit Design
Designing integrated circuits able to work under low-voltage (LV) low-power (LP) condition is currently undergoing a very considerable boom. Reducing voltage supply and power consumption of integrated circuits is crucial factor since in general it ensures the device reliability, prevents overheating of the circuits and in particular prolongs the operation period for battery powered devices. Recently, non-conventional techniques i.e. bulk-driven (BD), floating-gate (FG) and quasi-floating-gate (QFG) techniques have been proposed as powerful ways to reduce the design complexity and push the voltage supply towards threshold voltage of the MOS transistors (MOST). Therefore, this paper presents the operation principle, the advantages and disadvantages of each of these techniques, enabling circuit designers to choose the proper design technique based on application requirements. As an example of application three operational transconductance amplifiers (OTA) base on these non-conventional techniques are presented, the voltage supply is only ±0.4 V and the power consumption is 23.5 ”W. PSpice simulation results using the 0.18 ”m CMOS technology from TSMC are included to verify the design functionality and correspondence with theory
Tunable class AB CMOS Gm-C channel filter for a bluetooth zero-IF receiver
A novel tunable third order low-pass Gm-C filter is
introduced. Programmable transconductors operating in class AB
have been used for its implementation hence featuring low
quiescent power consumption. The operation in class AB is
achieved using quasi-floating gate transistors. This filter is
suitable for channel filtering of highly integrated, ultra low
power wireless receivers e.g. for Bluetooth and Zigbee.
Measurement results for a test chip prototype in a low-cost 0.5”m standard CMOS process are presented
Utilizing Unconventional CMOS Techniques for Low Voltage Low Power Analog Circuits Design for Biomedical Applications
Tato disertaÄnĂ prĂĄce se zabĂœvĂĄ navrĆŸenĂm nĂzkonapÄĆ„ovĂœch, nĂzkopĆĂkonovĂœch analogovĂœch obvodĆŻ, kterĂ© pouĆŸĂvajĂ nekonvenÄnĂ techniky CMOS. LĂ©kaĆskĂĄ zaĆĂzenĂ na bateriovĂ© napĂĄjenĂ, jako systĂ©my pro dlouhodobĂœ fyziologickĂœ monitoring, pĆenosnĂ© systĂ©my, implantovatelnĂ© systĂ©my a systĂ©my vhodnĂ© na noĆĄenĂ, musĂ bĂœt male a lehkĂ©. KromÄ toho je nutnĂ©, aby byly tyto systĂ©my vybaveny bateriĂ s dlouhou ĆŸivotnostĂ. Z tohoto dĆŻvodu pĆevlĂĄdajĂ v biomedicĂnskĂœch aplikacĂch tohoto typu nĂzkopĆĂkonovĂ© integrovanĂ© obvody. NekonvenÄnĂ techniky jako napĆ. vyuĆŸitĂ transistorĆŻ s ĆĂzenĂœm substrĂĄtem (Bulk-Driven âBDâ), s plovoucĂm hradlem (Floating-Gate âFGâ), s kvazi plovoucĂm hradlem (Quasi-Floating-Gate âQFGâ), s ĆĂzenĂœm substrĂĄtem s plovoucĂm hradlem (Bulk-Driven Floating-Gate âBD-FGâ) a s ĆĂzenĂœm substrĂĄtem s kvazi plovoucĂm hradlem (Bulk-Driven Quasi-Floating-Gate âBD-QFGâ), se v nedĂĄvnĂ© dobÄ ukĂĄzaly jako efektivnĂ prostĆedek ke zjednoduĆĄenĂ obvodovĂ©ho zapojenĂ a ke snĂĆŸenĂ velikosti napĂĄjecĂho napÄtĂ smÄrem k prahovĂ©mu napÄtĂ u tranzistorĆŻ MOS (MOST). V prĂĄci jsou podrobnÄ pĆedstaveny nejdĆŻleĆŸitÄjĆĄĂ charakteristiky nekonvenÄnĂch technik CMOS. Tyto techniky byly pouĆŸity pro vytvoĆenĂ nĂzko napÄĆ„ovĂœch a nĂzko vĂœkonovĂœch CMOS struktur u nÄkterĂœch aktivnĂch prvkĆŻ, napĆ. Operational Transconductance Amplifier (OTA) zaloĆŸenĂ© na BD, FG, QFG, a BD-QFG techniky; Tunable Transconductor zaloĆŸenĂœ na BD MOST; Current Conveyor Transconductance Amplifier (CCTA) zaloĆŸenĂœ na BD-QFG MOST; Z Copy-Current Controlled-Current Differencing Buffered Amplifier (ZC-CC-CDBA) zaloĆŸenĂœ na BD MOST; Winner Take All (WTA) and Loser Take All (LTA) zaloĆŸenĂœ na BD MOST; Fully Balanced Four-Terminal Floating Nullor (FBFTFN) zaloĆŸenĂœ na BD-QFG technice. Za ĂșÄelem ovÄĆenĂ funkÄnosti vĂœĆĄe zmĂnÄnĂœch struktur, byly tyto struktury pouĆŸity v nÄkolika aplikacĂch. VĂœkon navrĆŸenĂœch aktivnĂch prvkĆŻ a pĆĂkladech aplikacĂ je ovÄĆovĂĄn prostĆednictvĂm simulaÄnĂch programĆŻ PSpice Äi Cadence za pouĆŸitĂ technologie 0.18 m CMOS.This doctoral thesis deals with designing ultra-low-voltage (LV) low-power (LP) analog circuits utilizing the unconventional CMOS techniques. Battery powered medical devices such as; long term physiological monitoring, portable, implantable, and wearable systems need to be small and lightweight. Besides, long life battery is essential need for these devices. Thus, low-power integrated circuits are always paramount in such biomedical applications. Recently, unconventional CMOS techniques i.e. Bulk-Driven (BD), Floating-Gate (FG), Quasi-Floating-Gate (QFG), Bulk-Driven Floating-Gate (BD-FG) and Bulk-Driven Quasi-Floating-Gate (BD-QFG) MOS transistors (MOSTs) have revealed as effective devices to reduce the circuit complexity and push the voltage supply of the circuit towards threshold voltage of the MOST. In this work, the most important features of the unconventional CMOS techniques are discussed in details. These techniques have been utilized to perform ultra-LV LP CMOS structures of several active elements i.e. Operational Transconductance Amplifier (OTA) based on BD, FG, QFG, and BD-QFG techniques; Tunable Transconductor based on BD MOST; Current Conveyor Transconductance Amplifier (CCTA) based on BD-QFG MOST; Z Copy-Current Controlled-Current Differencing Buffered Amplifier (ZC-CC-CDBA) based on BD MOST; Winner Take All (WTA) and Loser Take All (LTA) based on BD MOST; Fully Balanced Four-Terminal Floating Nullor (FBFTFN) based on BD-QFG technique. Moreover, to verify the workability of the proposed structures, they were employed in several applications. The performance of the proposed active elements and their applications were investigated through PSpice or Cadence simulation program using 0.18 m CMOS technology.
360 nW gate-driven ultra-low voltage CMOS linear transconductor with 1 MHz bandwidth and wide input range
A low voltage linear transconductor is introduced. The circuit is a pseudo differential architecture that operates with ±0.2V supplies and uses 900nA total biasing current. It employs a floating battery technique to achieve low voltage operation. The transconductor has a 1MHz bandwidth. It exhibits a SNR = 72dB, SFDR = 42dB and THD = 0.83% for a 100mVpp 10kHz sinusoidal input signal. Moreover, stability is not affected by the capacitance of the signal source. The circuit has been validated with a prototype chip fabricated in a 130nm CMOS technology.This work was supported in part by the
Agencia Estatal de Investigacion/Fondo Europeo de Desarrollo Regional under
Grant TEC2016-80396-C2. The work of Hector D. Rico-Aniles was supported
by the Mexican Consejo Nacional de Ciencia y Tecnologia for the through an
Academic Scholarship under Grant 408946
Low Voltage Low Power Analogue Circuits Design
DisertaÄnĂ prĂĄce je zamÄĆena na vĂœzkum nejbÄĆŸnÄjĆĄĂch metod, kterĂ© se vyuĆŸĂvajĂ pĆi nĂĄvrhu analogovĂœch obvodĆŻ s vyuĆŸitĂ nĂzkonapÄĆ„ovĂœch (LV) a nĂzkopĆĂkonovĂœch (LP) struktur. Tyto LV LP obvody mohou bĂœt vytvoĆeny dĂky vyspÄlĂœm technologiĂm nebo takĂ© vyuĆŸitĂm pokroÄilĂœch technik nĂĄvrhu. DisertaÄnĂ prĂĄce se zabĂœvĂĄ prĂĄvÄ pokroÄilĂœmi technikami nĂĄvrhu, pĆedevĆĄĂm pak nekonvenÄnĂmi. Mezi tyto techniky patĆĂ vyuĆŸitĂ prvkĆŻ s ĆĂzenĂœm substrĂĄtem (bulk-driven - BD), s plovoucĂm hradlem (floating-gate - FG), s kvazi plovoucĂm hradlem (quasi-floating-gate - QFG), s ĆĂzenĂœm substrĂĄtem s plovoucĂm hradlem (bulk-driven floating-gate - BD-FG) a s ĆĂzenĂœm substrĂĄtem s kvazi plovoucĂm hradlem (quasi-floating-gate - BD-QFG). PrĂĄce je takĂ© orientovĂĄna na moĆŸnĂ© zpĆŻsoby implementace znĂĄmĂœch a modernĂch aktivnĂch prvkĆŻ pracujĂcĂch v napÄĆ„ovĂ©m, proudovĂ©m nebo mix-mĂłdu. Mezi tyto prvky lze zaÄlenit zesilovaÄe typu OTA (operational transconductance amplifier), CCII (second generation current conveyor), FB-CCII (fully-differential second generation current conveyor), FB-DDA (fully-balanced differential difference amplifier), VDTA (voltage differencing transconductance amplifier), CC-CDBA (current-controlled current differencing buffered amplifier) a CFOA (current feedback operational amplifier). Za ĂșÄelem potvrzenĂ funkÄnosti a chovĂĄnĂ vĂœĆĄe zmĂnÄnĂœch struktur a prvkĆŻ byly vytvoĆeny pĆĂklady aplikacĂ, kterĂ© simulujĂ usmÄrĆovacĂ a induktanÄnĂ vlastnosti diody, dĂĄle pak filtry dolnĂ propusti, pĂĄsmovĂ© propusti a takĂ© univerzĂĄlnĂ filtry. VĆĄechny aktivnĂ prvky a pĆĂklady aplikacĂ byly ovÄĆeny pomocĂ PSpice simulacĂ s vyuĆŸitĂm parametrĆŻ technologie 0,18 m TSMC CMOS. Pro ilustraci pĆesnĂ©ho a ĂșÄinnĂ©ho chovĂĄnĂ struktur je v disertaÄnĂ prĂĄci zahrnuto velkĂ© mnoĆŸstvĂ simulaÄnĂch vĂœsledkĆŻ.The dissertation thesis is aiming at examining the most common methods adopted by analog circuits' designers in order to achieve low voltage (LV) low power (LP) configurations. The capability of LV LP operation could be achieved either by developed technologies or by design techniques. The thesis is concentrating upon design techniques, especially the nonâconventional ones which are bulkâdriven (BD), floatingâgate (FG), quasiâfloatingâgate (QFG), bulkâdriven floatingâgate (BDâFG) and bulkâdriven quasiâfloatingâgate (BDâQFG) techniques. The thesis also looks at ways of implementing structures of wellâknown and modern active elements operating in voltageâ, currentâ, and mixedâmode such as operational transconductance amplifier (OTA), second generation current conveyor (CCII), fullyâdifferential second generation current conveyor (FBâCCII), fullyâbalanced differential difference amplifier (FBâDDA), voltage differencing transconductance amplifier (VDTA), currentâcontrolled current differencing buffered amplifier (CCâCDBA) and current feedback operational amplifier (CFOA). In order to confirm the functionality and behavior of these configurations and elements, they have been utilized in application examples such as diodeâless rectifier and inductance simulations, as well as lowâpass, bandâpass and universal filters. All active elements and application examples have been verified by PSpice simulator using the 0.18 m TSMC CMOS parameters. Sufficient numbers of simulated plots are included in this thesis to illustrate the precise and strong behavior of structures.
Circuits for Analog Signal Processing Employing Unconventional Active Elements
DisertaÄnĂ prĂĄce se zabĂœvĂĄ zavĂĄdÄnĂm novĂœch struktur modernĂch aktivnĂch prvkĆŻ pracujĂcĂch v napÄĆ„ovĂ©m, proudovĂ©m a smĂĆĄenĂ©m reĆŸimu. FunkÄnost a chovĂĄnĂ tÄchto prvkĆŻ byly ovÄĆeny prostĆednictvĂm SPICE simulacĂ. V tĂ©to prĂĄci je zahrnuta Ćada simulacĂ, kterĂ© dokazujĂ pĆesnost a dobrĂ© vlastnosti tÄchto prvkĆŻ, pĆiÄemĆŸ velkĂœ dĆŻraz byl kladen na to, aby tyto prvky byly schopny pracovat pĆi nĂzkĂ©m napĂĄjecĂm napÄtĂ, jelikoĆŸ poptĂĄvka po pĆenosnĂœch elektronickĂœch zaĆĂzenĂch a implantabilnĂch zdravotnickĂœch pĆĂstrojĂch stĂĄle roste. Tyto pĆĂstroje jsou napĂĄjeny bateriemi a k tomu, aby byla prodlouĆŸena jejich ĆŸivotnost, trend navrhovĂĄnĂ analogovĂœch obvodĆŻ smÄĆuje k stĂĄle vÄtĆĄĂmu sniĆŸovĂĄnĂ spotĆeby a napĂĄjecĂho napÄtĂ. HlavnĂm pĆĂnosem tĂ©to prĂĄce je nĂĄvrh novĂœch CMOS struktur: CCII (Current Conveyor Second Generation) na zĂĄkladÄ BD (Bulk Driven), FG (Floating Gate) a QFG (Quasi Floating Gate); DVCC (Differential Voltage Current Conveyor) na zĂĄkladÄ FG, transkonduktor na zĂĄkladÄ novĂ© techniky BD_QFG (Bulk Driven_Quasi Floating Gate), CCCDBA (Current Controlled Current Differencing Buffered Amplifier) na zĂĄkladÄ GD (Gate Driven), VDBA (Voltage Differencing Buffered Amplifier) na zĂĄkladÄ GD a DBeTA (Differential_Input Buffered and External Transconductance Amplifier) na zĂĄkladÄ BD. DĂĄle je uvedeno nÄkolik zajĂmavĂœch aplikacĂ uĆŸĂvajĂcĂch vĂœĆĄe jmenovanĂ© prvky. ZĂskanĂ© vĂœsledky simulacĂ odpovĂdajĂ teoretickĂœm pĆedpokladĆŻm.The dissertation thesis deals with implementing new structures of modern active elements working in voltage_, current_, and mixed mode. The functionality and behavior of these elements have been verified by SPICE simulation. Sufficient numbers of simulated plots are included in this thesis to illustrate the precise and strong behavior of those elements. However, a big attention to implement active elements by utilizing LV LP (Low Voltage Low Power) techniques is given in this thesis. This attention came from the fact that growing demand of portable electronic equipments and implantable medical devices are pushing the development towards LV LP integrated circuits because of their influence on batteries lifetime. More specifically, the main contribution of this thesis is to implement new CMOS structures of: CCII (Current Conveyor Second Generation) based on BD (Bulk Driven), FG (Floating Gate) and QFG (Quasi Floating Gate); DVCC (Differential Voltage Current Conveyor) based on FG; Transconductor based on new technique of BD_QFG (Bulk Driven_Quasi Floating Gate); CCCDBA (Current Controlled Current Differencing Buffered Amplifier) based on conventional GD (Gate Driven); VDBA (Voltage Differencing Buffered Amplifier) based on GD. Moreover, defining new active element i.e. DBeTA (Differential_Input Buffered and External Transconductance Amplifier) based on BD is also one of the main contributions of this thesis. To confirm the workability and attractive properties of the proposed circuits many applications were exhibited. The given results agree well with the theoretical anticipation.
Energy-Efficient Amplifiers Based on Quasi-Floating Gate Techniques
Energy efficiency is a key requirement in the design of amplifiers for modern wireless
applications. The use of quasi-floating gate (QFG) transistors is a very convenient approach to
achieve such energy efficiency. We illustrate different QFG circuit design techniques aimed to
implement low-voltage, energy-efficient class AB amplifiers. A new super class AB QFG amplifier is
presented as a design example, including some of the techniques described. The amplifier has been
fabricated in a 130 nm CMOS test chip prototype. Measurement results confirm that low-voltage,
ultra-low-power amplifiers can be designed, preserving, at the same time, excellent small-signal and
large-signal performance.Agencia Estatal de InvestigaciĂłn PID2019-107258RB-C32UniĂłn Europea PID2019-107258RB-C3
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