10,246 research outputs found
Formal Probabilistic Analysis of a Wireless Sensor Network for Forest Fire Detection
Wireless Sensor Networks (WSNs) have been widely explored for forest fire
detection, which is considered a fatal threat throughout the world. Energy
conservation of sensor nodes is one of the biggest challenges in this context
and random scheduling is frequently applied to overcome that. The performance
analysis of these random scheduling approaches is traditionally done by
paper-and-pencil proof methods or simulation. These traditional techniques
cannot ascertain 100% accuracy, and thus are not suitable for analyzing a
safety-critical application like forest fire detection using WSNs. In this
paper, we propose to overcome this limitation by applying formal probabilistic
analysis using theorem proving to verify scheduling performance of a real-world
WSN for forest fire detection using a k-set randomized algorithm as an energy
saving mechanism. In particular, we formally verify the expected values of
coverage intensity, the upper bound on the total number of disjoint subsets,
for a given coverage intensity, and the lower bound on the total number of
nodes.Comment: In Proceedings SCSS 2012, arXiv:1307.802
Developing a distributed electronic health-record store for India
The DIGHT project is addressing the problem of building a scalable and highly available information store for the Electronic Health Records (EHRs) of the over one billion citizens of India
Towards the Model-Driven Engineering of Secure yet Safe Embedded Systems
We introduce SysML-Sec, a SysML-based Model-Driven Engineering environment
aimed at fostering the collaboration between system designers and security
experts at all methodological stages of the development of an embedded system.
A central issue in the design of an embedded system is the definition of the
hardware/software partitioning of the architecture of the system, which should
take place as early as possible. SysML-Sec aims to extend the relevance of this
analysis through the integration of security requirements and threats. In
particular, we propose an agile methodology whose aim is to assess early on the
impact of the security requirements and of the security mechanisms designed to
satisfy them over the safety of the system. Security concerns are captured in a
component-centric manner through existing SysML diagrams with only minimal
extensions. After the requirements captured are derived into security and
cryptographic mechanisms, security properties can be formally verified over
this design. To perform the latter, model transformation techniques are
implemented in the SysML-Sec toolchain in order to derive a ProVerif
specification from the SysML models. An automotive firmware flashing procedure
serves as a guiding example throughout our presentation.Comment: In Proceedings GraMSec 2014, arXiv:1404.163
Quantitative Verification: Formal Guarantees for Timeliness, Reliability and Performance
Computerised systems appear in almost all aspects of our daily lives, often in safety-critical scenarios such as embedded control systems in cars and aircraft
or medical devices such as pacemakers and sensors. We are thus increasingly reliant on these systems working correctly, despite often operating in unpredictable or unreliable environments. Designers of such devices need ways to guarantee that they will operate in a reliable and efficient manner.
Quantitative verification is a technique for analysing quantitative aspects of a system's design, such as timeliness, reliability or performance. It applies formal methods, based on a rigorous analysis of a mathematical model of the system, to automatically prove certain precisely specified properties, e.g. ``the airbag will always deploy within 20 milliseconds after a crash'' or ``the probability of both sensors failing simultaneously is less than 0.001''.
The ability to formally guarantee quantitative properties of this kind is beneficial across a wide range of application domains. For example, in safety-critical systems, it may be essential to establish credible bounds on the probability with which certain failures or combinations of failures can occur. In embedded control systems, it is often important to comply with strict constraints on timing or resources. More generally, being able to derive guarantees on precisely specified levels of performance or efficiency is a valuable tool in the design of, for example, wireless networking protocols, robotic systems or power management algorithms, to name but a few.
This report gives a short introduction to quantitative verification, focusing in particular on a widely used technique called model checking, and its generalisation to the analysis of quantitative aspects of a system such as timing, probabilistic behaviour or resource usage.
The intended audience is industrial designers and developers of systems such as those highlighted above who could benefit from the application of quantitative verification,but lack expertise in formal verification or modelling
Virtual Communication Stack: Towards Building Integrated Simulator of Mobile Ad Hoc Network-based Infrastructure for Disaster Response Scenarios
Responses to disastrous events are a challenging problem, because of possible
damages on communication infrastructures. For instance, after a natural
disaster, infrastructures might be entirely destroyed. Different network
paradigms were proposed in the literature in order to deploy adhoc network, and
allow dealing with the lack of communications. However, all these solutions
focus only on the performance of the network itself, without taking into
account the specificities and heterogeneity of the components which use it.
This comes from the difficulty to integrate models with different levels of
abstraction. Consequently, verification and validation of adhoc protocols
cannot guarantee that the different systems will work as expected in
operational conditions. However, the DEVS theory provides some mechanisms to
allow integration of models with different natures. This paper proposes an
integrated simulation architecture based on DEVS which improves the accuracy of
ad hoc infrastructure simulators in the case of disaster response scenarios.Comment: Preprint. Unpublishe
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