Typing Composable Coroutines

Coroutine, as a powerful programming construct, is widely used in asynchronous applications to replace thread-based programming or the callback hell. Using coroutines makes code more readable and maintainable, for its ability to transfer control while keeping the literal scope. However, reasoning about coroutine behavior can be challenging without proper typing. We propose a type notation and calculus for composing asymmetric, first-class, stackless coroutines. Given the types of a list of coroutines, we can compute a composed type matching the collective behavior of the coroutines, so that the input and output can be type-checked by a type system. Our coroutine types can model the data received by or yielded from a coroutine, which be of coroutine types as well. On top of our type calculus, we discuss its soundness and evaluation issues, then provide four application scenarios of our coroutine types. Not only can our types be used in modern programming languages, such as Python, but also model program behaviors in OCaml and even Prolog

On an Intuitionistic Logic for Pragmatics

We reconsider the pragmatic interpretation of intuitionistic logic [21] regarded as a logic of assertions and their justications and its relations with classical logic. We recall an extension of this approach to a logic dealing with assertions and obligations, related by a notion of causal implication [14, 45]. We focus on the extension to co-intuitionistic logic, seen as a logic of hypotheses [8, 9, 13] and on polarized bi-intuitionistic logic as a logic of assertions and conjectures: looking at the S4 modal translation, we give a denition of a system AHL of bi-intuitionistic logic that correctly represents the duality between intuitionistic and co-intuitionistic logic, correcting a mistake in previous work [7, 10]. A computational interpretation of cointuitionism as a distributed calculus of coroutines is then used to give an operational interpretation of subtraction.Work on linear co-intuitionism is then recalled, a linear calculus of co-intuitionistic coroutines is dened and a probabilistic interpretation of linear co-intuitionism is given as in [9]. Also we remark that by extending the language of intuitionistic logic we can express the notion of expectation, an assertion that in all situations the truth of p is possible and that in a logic of expectations the law of double negation holds. Similarly, extending co-intuitionistic logic, we can express the notion of conjecture that p, dened as a hypothesis that in some situation the truth of p is epistemically necessary

Multiparty Session Actors

Actor coordination armoured with a suitable protocol description language has been a pressing problem in the actors community. We study the applicability of multiparty session type (MPST) protocols for verification of actor programs. We incorporate sessions to actors by introducing minimum additions to the model such as the notion of actor roles and protocol mailbox. The framework uses Scribble, which is a protocol description language based on multiparty session types. Our programming model supports actor-like syntax and runtime verification mechanism guaranteeing type-safety and progress of the communicating entities. An actor can implement multiple roles in a similar way as an object can implement multiple interfaces. Multiple roles allow for inter-concurrency in a single actor still preserving its progress property. We demonstrate our framework by designing and implementing a session actor library in Python and its runtime verification mechanism.Comment: In Proceedings PLACES 2014, arXiv:1406.331

Linear and Affine Typing of Continuation-Passing Style

Submitted for the degree of Doctor of Philosophy, Queen Mary, University of Londo

Programmiersprachen und Rechenkonzepte

Seit 1984 veranstaltet die GI-Fachgruppe "Programmiersprachen und Rechenkonzepte" regelmäßig im Frühjahr einen Workshop im Physikzentrum Bad Honnef. Das Treffen dient in erster Linie dem gegenseitigen Kennenlernen, dem Erfahrungsaustausch, der Diskussion und der Vertiefung gegenseitiger Kontakte. In diesem Forum werden Vorträge und Demonstrationen sowohl bereits abgeschlossener als auch noch laufender Arbeiten vorgestellt, unter anderem (aber nicht ausschließlich) zu Themen wie - Sprachen, Sprachparadigmen, - Korrektheit von Entwurf und Implementierung, -Werkzeuge, -Software-/Hardware-Architekturen, -Spezifikation, Entwurf, - Validierung, Verifikation, - Implementierung, Integration, - Sicherheit (Safety und Security), - eingebettete Systeme, - hardware-nahe Programmierung. In diesem Technischen Bericht sind einige der präsentierten Arbeiten zusammen gestellt

A low-cost implementation of coroutines for C

We identify a set of primitive operations supporting coroutines, and demonstrate their usefulness. We then address their implementation in C according to a set of criteria aimed at maintaining simplicity, and achieve a satisfactory compromise between it and effectiveness. Our package for the PDP-II under UNIX allows users of coroutines in C programs to gain access to the primitives via an included definitions file and an object library; no penalty is imposed upon non-coroutine users

UVM testbench in Python:feature and performance comparison with SystemVerilog implementation

Abstract. Python is emerging as a new language for functional verification of digital integrated circuits (ICs). With the Python verification framework cocotb enabling to write testbenches in Python, new libraries are being developed for various verification techniques and methodologies, such as functional coverage, constrained random verification and Universal Verification Methodology (UVM). Python testbenches have been used in some research and product development, but there is little information available on their performance, and no studies about applying UVM in Python have been published. In this thesis, a Python UVM testbench was developed using pyuvm and other Python verification libraries for an AHB-Lite slave IP, and a matching testbench in SystemVerilog was also built to examine the differences in their implementations. Testbench codebase sizes, simulation execution times, memory use and coverage accumulation were compared. The Python testbench had 30% less lines of code, suggesting that testbench development may be faster in Python than SystemVerilog. The execution times of the Python testbench on commercial simulators were 8 to 21 times longer than those of the SystemVerilog testbench in tests with AHB-Lite write operations and random stimulus. In conclusion, given the performance gap and the UVM Register Abstraction Layer (RAL) being at an early stage of development in pyuvm, the studied Python libraries are not competitive with SystemVerilog and its UVM implementation for verifying complex designs like systems-on-chip (SoCs) at this stage. Nevertheless, pyuvm enables Python programmers and users of open-source simulators without support for SystemVerilog UVM to start using the methodology. A Python UVM testbench based on pyuvm is currently viable for verifying simple designs, and it opens new avenues of research in digital IC verification.Tiivistelmä. Python on nousemassa uudeksi kieleksi digitaalisten integroitujen piirien varmennukseen. Cocotb-viitekehys mahdollistaa testipenkkien kirjoittamisen Pythonilla, ja uusia Python-kirjastoja kehitetään eri varmennusmenetelmille, kuten funktionaaliselle kattavuudelle, rajoitetulla satunnaisherätteellä verifioinnille ja universaalille varmennusmenetelmälle (engl. Universal Verification Methodology, UVM). Python-testipenkkejä on pienissä määrin käytetty tutkimuksissa ja tuotekehityksessä, mutta niiden suorituskyvystä on hyvin vähän tietoa, ja UVM:n käytöstä Pythonilla ei ole julkaistu tutkimuksia. Tässä työssä kehitettiin UVM-testipenkki Pythonilla AHB-Lite-orjana toimivalle IP-lohkolle käyttäen pyuvm:ää ja muita Python-verifiointikirjastoja, ja vastaava testipenkki luotiin myös SystemVerilogilla toteutusten vertailua varten. Testipenkeistä verrattiin koodikannan kokoa, suoritusaikaa, muistin käyttöä ja kattavuuden kertymistä. Python-testipenkissä oli 30 % vähemmän koodirivejä, mikä voi merkitä, että testipenkkien kehittäminen Pythonilla on nopeampaa kuin SystemVerilogilla. Suoritusajat kaupallisilla simulaattoreilla oli Python-testipenkillä 8–21 kertaa pidempiä kuin SystemVerilog-testipenkillä testeissä, joissa ajettiin AHB-Lite -kirjoitusoperaatioita ja satunnaisherätettä. Koska suorituskykyero oli näin merkittävä, ja koska UVM:n rekisteriabstraktiotaso (engl. Register Abstraction Layer, RAL) on vasta alkutekijöissään pyuvm:ssä, voidaan todeta, että tutkitut Python-kirjastot eivät ole vielä nykyisellä tasollaan kilpailukykyisiä SystemVerilogin ja sen UVM-implementaation kanssa monimutkaisten piirien kuten järjestelmäpiirien varmennukseen. Siitä huolimatta pyuvm mahdollistaa UVM:n käytön Python-ohjelmoijille ja avoimen lähdekoodin simulaattoreissa, joissa ei ole vielä SystemVerilog UVM:lle tukea. Pyuvm-pohjainen Python UVM-testipenkki soveltuu tällä hetkellä yksinkertaisten mallien varmennukseen ja avaa uusia tutkimussuuntia digitaalisten integroitujen piirien varmennukseen