Improved Time and Frequency Synchronization Algorithm for 802.11a Wireless Standard based on the SIGNAL Field

International audienceTime and frequency synchronization in the IEEE 802.11a OFDM (Orthogonal Frequency Division Multiplexing) wireless communication system is addressed in this paper. Usually synchronization algorithms rely only on training sequences specified by the standard. To enhance the synchronization between stations, we propose to extract known information by both the transmitter and the receiver at the IEEE 802.11a physical layer to be then exploited by the receiver in addition to the training sequences. Indeed the parts of the identified SIGNAL field are either known or predictable from the RtS (Request to Send) control frame when the CSMA/CA (Carrier Sense Multiple Access with Collision Avoidance) mechanism is triggered jointly to bit-rate adaptation algorithms to the channel. Moreover the received RtS control frame allows the receiver to estimate the channel before time synchronization stage improving then the performance of the proposed synchronization algorithm. Simulation results show that the performance of the proposed synchronization algorithm is improved as compared to existing algorithms

Scattered Pilots and Virtual Carriers Based Frequency Offset Tracking for OFDM Systems: Algorithms, Identifiability, and Performance Analysis

In this paper, we propose a novel carrier frequency offset (CFO) tracking algorithm for orthogonal frequency division multiplexing (OFDM) systems by exploiting scattered pilot carriers and virtual carriers embedded in the existing OFDM standards. Assuming that the channel remains constant during two consecutive OFDM blocks and perfect timing, a CFO tracking algorithm is proposed using the limited number of pilot carriers in each OFDM block. Identifiability of this pilot based algorithm is fully discussed under the noise free environment, and a constellation rotation strategy is proposed to eliminate the c-ambiguity for arbitrary constellations. A weighted algorithm is then proposed by considering both scattered pilots and virtual carriers. We find that, the pilots increase the performance accuracy of the algorithm, while the virtual carriers reduce the chance of CFO outlier. Therefore, the proposed tracking algorithm is able to achieve full range CFO estimation, can be used before channel estimation, and could provide improved performance compared to existing algorithms. The asymptotic mean square error (MSE) of the proposed algorithm is derived and simulation results agree with the theoretical analysis

Low Complexity Time Synchronization Algorithm for OFDM Systems with Repetitive Preambles

In this paper, a new time synchronization algorithm for OFDM systems with repetitive preamble is proposed. This algorithm makes use of coarse and fine time estimation; the fine time estimation is performed using a cross-correlation similar to previous proposals in the literature, whereas the coarse time estimation is made using a new metric and an iterative search of the last sample of the repetitive preamble. A complete analysis of the new metric is included, as well as a wide performance comparison, for multipath channel and carrier frequency offset, with the main time synchronization algorithms found in the literature. Finally, the complexity of the VLSI implementation of this proposal is discussed. © 2011 Springer Science+Business Media, LLC.This work was supported by the Spanish Ministerio de Educacion y Ciencia under grants TEC2006-14204-C02-01 and TEC2008-06787.Canet Subiela, MJ.; Almenar Terre, V.; Flores Asenjo, SJ.; Valls Coquillat, J. (2012). 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Implementation of OFDM modem for the physical layer of IEEE 802.11a standard based on Xilinx Virtex-II FPGA

In this thesis, a prototype design for the Physical Layer of IEEE 802.11a standard, which is based on Orthogonal Frequency Division Multiplexing (OFDM) technique, is presented. Implementation aspects of an OFDM modem on Xilinx Virtex II field programmable gate array (FPGA) are addressed. The system includes a synchronization circuitry used for packet detection and time synchronization. The design flow starts with floating-point modeling with parameters specified by IEEE 802.11a for the physical layer of indoor Wireless Local Area Network (WLAN) modems. After algorithmic exploration and performance simulations, the fixed-point refinement is verified to compromise between sufficient arithmetic precision and high-speed hardware necessary for real-time communication systems. At this step of design, different synchronization schemes are examined and as the result of comparison; a modified algorithm based on the delayed correlation of received preamble symbols is selected for hardware implementation. Finally, the architecture with lowest power consumption and required speed specified by the standard is achieved. This design is efficiently synthesized on 0.15om/0.12om CMOS 8-layer metal process Virtex II FPGA. The resulting hardware implementation is simulated at the system clock speed of 72MHz and analyzed from timing point of view to verify adequate performance

Baseband processor for IEEE 802.11a standard with embedded BIST

In this paper results of an IEEE 802.11a compliant low-power baseband processor implementation are presented. The detailed structure of the baseband processor and its constituent blocks is given. A design for testability strategy based on Built-In Self-Test (BIST) is proposed. Finally implementational results and power estimation are reported

Preprint: Using RF-DNA Fingerprints To Classify OFDM Transmitters Under Rayleigh Fading Conditions

The Internet of Things (IoT) is a collection of Internet connected devices capable of interacting with the physical world and computer systems. It is estimated that the IoT will consist of approximately fifty billion devices by the year 2020. In addition to the sheer numbers, the need for IoT security is exacerbated by the fact that many of the edge devices employ weak to no encryption of the communication link. It has been estimated that almost 70% of IoT devices use no form of encryption. Previous research has suggested the use of Specific Emitter Identification (SEI), a physical layer technique, as a means of augmenting bit-level security mechanism such as encryption. The work presented here integrates a Nelder-Mead based approach for estimating the Rayleigh fading channel coefficients prior to the SEI approach known as RF-DNA fingerprinting. The performance of this estimator is assessed for degrading signal-to-noise ratio and compared with least square and minimum mean squared error channel estimators. Additionally, this work presents classification results using RF-DNA fingerprints that were extracted from received signals that have undergone Rayleigh fading channel correction using Minimum Mean Squared Error (MMSE) equalization. This work also performs radio discrimination using RF-DNA fingerprints generated from the normalized magnitude-squared and phase response of Gabor coefficients as well as two classifiers. Discrimination of four 802.11a Wi-Fi radios achieves an average percent correct classification of 90% or better for signal-to-noise ratios of 18 and 21 dB or greater using a Rayleigh fading channel comprised of two and five paths, respectively.Comment: 13 pages, 14 total figures/images, Currently under review by the IEEE Transactions on Information Forensics and Securit