An Advanced Three-Level Active Neutral-Point-Clamped Converter With Improved Fault-Tolerant Capabilities

A resilient fault-tolerant silicon carbide (SiC) three-level power converter topology is introduced based on the traditional active neutral-point-clamped converter. This novel converter topology incorporates a redundant leg to provide fault tolerance during switch open-circuit faults and short-circuit faults. Additionally, the topology is capable of maintaining full output voltage and maximum modulation index in the presence of switch open and short-circuit faults. Moreover, the redundant leg can be employed to share load current with other phase legs to balance thermal stress among semiconductor switches during normal operation. A 25-kW prototype of the novel topology was designed and constructed utilizing 1.2-kV SiC metal-oxide-semiconductor field-effect transistors. Experimental results confirm the anticipated theoretical capabilities of this new three-level converter topology

Cost and losses associated with offshore wind farm collection networks which centralise the turbine power electronic converters

Costs and losses have been calculated for several different network topologies, which centralise the turbine power electronic converters, in order to improve access for maintenance. These are divided into star topologies, where each turbine is connected individually to its own converter on a platform housing many converters, and cluster topologies, where multiple turbines are connected through a single large converter. Both AC and DC topologies were considered, along with standard string topologies for comparison. Star and cluster topologies were both found to have higher costs and losses than the string topology. In the case of the star topology, this is due to the longer cable length and higher component count. In the case of the cluster topology, this is due to the reduced energy capture from controlling turbine speeds in clusters rather than individually. DC topologies were generally found to have a lower cost and loss than AC, but the fact that the converters are not commercially available makes this advantage less certain

Switching-Cell Arrays - An Alternative Design Approach in Power Conversion

© 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting /republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other worksThe conventional design of voltage-source power converters is based on a two-level half-bridge configuration and the selection of power devices designed to meet the full application specifications (voltage, current, etc.). This leads to the need to design and optimize a large number of different devices and their ancillary circuitry and prevents taking advantage from scale economies. This paper proposes a paradigm shift in the design of power converters through the use of a novel configurable device consisting on a matrix arrangement of highly-optimized switching cells at a single voltage class. Each switching cell consists of a controlled switch with antiparallel diode together with a self-powered gate driver. By properly interconnecting the switching cells, the switching cell array (SCA) can be configured as a multilevel active-clamped leg with different number of levels. Thus, the SCA presents adjustable voltage and current ratings, according to the selected configuration. For maximum compactness, the SCA can be conceived to be only configurable by the device manufacturer upon the customer needs. For minimum cost, it can also be conceived to be configurable by the customer, leading to field-configurable SCAs. Experimental results of a 6x3 field-configurable SCA are provided to illustrate and validate this design approach.Peer ReviewedPostprint (author's final draft

A Fault-Tolerant T-Type Multilevel Inverter Topology With Increased Overload Capability and Soft-Switching Characteristics

he performance of a novel three-phase four-leg fault-tolerant T-type inverter topology is introduced in this paper. This inverter topology provides a fault-tolerant solution to any open-circuit and certain short-circuit switching faults in the power devices. During any of the fault-tolerant operation modes for these device faults, there is no derating required in the inverter output voltage or output power. In addition, overload capability is increased in this new T-type inverter compared to that in the conventional three-level T-type inverter. Such increase in inverter overload capability is due to the utilization of the redundant leg for overload current sharing with other main phase legs under healthy condition. Moreover, if the redundant phase leg is composed of silicon carbide metal-oxide-semiconductor field-effect transistors, quasi-zero-voltage switching, and zero-current switching of the silicon insulated-gate bipolar transistors (IGBTs) in the conventional main phase legs can be achieved at certain switching states, which can significantly relieve the thermal stress on the outer IGBTs and improve the whole inverter efficiency. Simulation and experimental results are given to verify the efficacy and merits of this high-performance fault-tolerant T-type inverter topology

The Alternate Arm Converter: A New Hybrid Multilevel Converter With DC-Fault Blocking Capability

This paper explains the working principles, supported by simulation results, of a new converter topology intended for HVDC applications, called the alternate arm converter (AAC). It is a hybrid between the modular multilevel converter, because of the presence of H-bridge cells, and the two-level converter, in the form of director switches in each arm. This converter is able to generate a multilevel ac voltage and since its stacks of cells consist of H-bridge cells instead of half-bridge cells, they are able to generate higher ac voltage than the dc terminal voltage. This allows the AAC to operate at an optimal point, called the “sweet spot,” where the ac and dc energy flows equal. The director switches in the AAC are responsible for alternating the conduction period of each arm, leading to a significant reduction in the number of cells in the stacks. Furthermore, the AAC can keep control of the current in the phase reactor even in case of a dc-side fault and support the ac grid, through a STATCOM mode. Simulation results and loss calculations are presented in this paper in order to support the claimed features of the AAC

Investigations of New Fault-Tolerant Methods for Multilevel Inverters

The demands of power electronics with high power capability have increased in the last decades. These needs have driven the expansion of existing power electronics topologies and developing new power electronics generations. Multilevel inverters (MLI) are one of the most promising power electronics circuits that have been implemented and commercialized in high-voltage direct current (HVDC), motor drives, and battery energy storage systems (BESS). The expanding uses of the MLI have lead to creation of new topologies for different applications. However, one of the disadvantages of using MLIs is their complexity. MLIs consist of a large number of switching devices, which can result in a reduction of system reliability. There are significant challenges to the design of a reliable system that has the MLI’s capability with integrated fault-tolerance. In other words, design a system that can handle the fault, totally or partially, while maintaining high power capabilities and efficiency. This aim of this dissertation is to investigate the fault-tolerance of MLIs from two different points of view: 1- Develop new solutions for existing MLI topologies. In other words, add some features to existing MLIs to improve their reliability when a fault occurs. 2- Design new MLIs that have a fault-tolerant capability. A new open-circuit fault detection is proposed in this dissertation. The new fault detection method is based on monitoring the output voltage of each cell and leg voltage polarity along with each switch state. By monitoring each cell output voltage and leg voltage, the faulty cell can be detected and isolated. A novel circuit to maintain system operation under the condition of one (or more) components suffering from a faulted condition is also proposed in this dissertation. This results in a topology that continues to operate at full capability. Additionally, a new topology is proposed that offers reducing the number of batteries by 50%. Also, it has the ability to operate under non-unity power factor, which enables it to be suitable for battery energy storage systems, and static compensator (STATCOM) applications. Another novel hybrid cascaded H-bridge (CHB), known as the X-CHB, for a fault-tolerant operation is proposed in this dissertation. It ensures seamless operation of the system under an open/short circuit switching fault or dc supply fault

An intelligent electronic fuse for selective isolation of faulty switching cells in power electronic converter legs to guarantee continuous operation

© 2022 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting /republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other worksThis article proposes a novel device designated as an intelligent electronic fuse (iFuse) intended to be connected in series with any current-bidirectional voltage-unidirectional active switch present in a power converter. The iFuse duty is to selectively isolate its series-associated switch from the rest of the converter circuit immediately after detecting that this switch has failed in short circuit. Nonetheless, it maintains the reverse (free-wheeling) current path originally offered by the failed switch. The failure detection is typically performed when the failed switch causes a shoot-through event. Therefore, the iFuse is able to block large currents. The iFuse allows increasing the power-converter fault tolerance and reliability with regard to switch short-circuit failures (SCFs), as in converters featuring switches in parallel, redundant legs, and multilevel neutral-point-clamped topologies. The reliability model analysis of a two-level converter leg with two parallel switches per position reveals that its reliability can be increased up to four times when an iFuse is implemented in series with each switch. The iFuse device feasibility and good performance are verified through experimental tests, proving that it can detect and isolate the associated-switch failure in 6 µs , while stopping short-circuit currents of up to 1 kA without incurring in harmful di / dt values.Peer ReviewedPostprint (author's final draft

Comparison between two VSC-HVDC transmission systems technologies : modular and neutral point clamped multilevel converter

The paper presents a detail comparison between two voltage source converter high voltage dc transmission systems, the first is based on neutral point-clamped (also known as HVDC-Light) and the second is based on innovative modular multilevel converter (known as HVDC-Plus). The comparison focuses on the reliability issues of both technologies such as fault ride-through capability and control flexibility. To address these issues, neutral point-clamped and three-level modular converters are considered in both stations of the dc transmission system, and several operating conditions are considered, including, symmetrical and asymmetrical faults. Computer simulation in Matlab-Simulink environment has been used to confirm the validity of the results

Special Power Electronics Converters and Machine Drives with Wide Band-Gap Devices

Power electronic converters play a key role in power generation, storage, and consumption. The major portion of power losses in the converters is dissipated in the semiconductor switching devices. In recent years, new power semiconductors based on wide band-gap (WBG) devices have been increasingly developed and employed in terms of promising merits including the lower on-state resistance, lower turn-on/off energy, higher capable switching frequency, higher temperature tolerance than conventional Si devices. However, WBG devices also brought new challenges including lower fault tolerance, higher system cost, gate driver challenges, and high dv/dt and resulting increased bearing current in electric machines. This work first proposed a hybrid Si IGBTs + SiC MOSFETs five-level transistor clamped H-bridge (TCHB) inverter which required significantly fewer number of semiconductor switches and fewer isolated DC sources than the conventional cascaded H-bridge inverter. As a result, system cost was largely reduced considering the high price of WBG devices in the present market. The semiconductor switches operated at carrier frequency were configured as Silicon Carbide (SiC) devices to improve the inverter efficiency, while the switches operated at fundamental output frequency (i.e., grid frequency) were constituted by Silicon (Si) IGBT devices. Different modulation strategies and control methods were developed and compared. In other words, this proposed SiC+Si hybrid TCHB inverter provided a solution to ride through a load short-circuit fault. Another special power electronic, multiport converter, was designed for EV charging station integrated with PV power generation and battery energy storage system. The control scheme for different charging modes was carefully developed to improve stabilization including power gap balancing, peak shaving, and valley filling, and voltage sag compensation. As a result, the influence on the power grid was reduced due to the matching between daily charging demand and adequate daytime PV generation. For special machine drives, such as slotless and coreless machines with low inductance, low core losses, typical drive implementations using conventional silicon-based devices are performance limited and also produce large current and torque ripples. In this research, WBG devices were employed to increase inverter switching frequency, reduce current ripple, reduce filter size, and as a result reduce drive system cost. Two inverter drive configurations were proposed and implemented with WBG devices in order to mitigate such issues for 2-phase very low inductance machines. Two inverter topologies, i.e., a dual H-bridge inverter with maximum redundancy and survivability and a 3-leg inverter for reduced cost, were considered. Simulation and experimental results validated the drive configurations in this dissertation. An integrated AC/AC converter was developed for 2-phase motor drives. Additionally, the proposed integrated AC/AC converter was systematically compared with commonly used topologies including AC/DC/AC converter and matrix converters, in terms of the output voltage/current capability, total harmonics distortion (THD), and system cost. Furthermore, closed-loop speed controllers were developed for the three topologies, and the maximum operating range and output phase currents were investigated. The proposed integrated AC/AC converter with a single-phase input and a 2-phase output reduced the switch count to six and resulting in minimized system cost and size for low power applications. In contrast, AC/DC/AC pulse width modulation (PWM) converters contained twelve active power semiconductor switches and a common DC link. Furthermore, a modulation scheme and filters for the proposed converter were developed and modeled in detail. For the significantly increased bearing current caused by the transition from Si devices to WBG devices, advanced modeling and analysis approach was proposed by using coupled field-circuit electromagnetic finite element analysis (FEA) to model bearing voltage and current in electric machines, which took into account the influence of distributed winding conductors and frequency-dependent winding RL parameters. Possible bearing current issues in axial-flux machines, and possibilities of computation time reduction, were also discussed. Two experimental validation approaches were proposed: the time-domain analysis approach to accurately capture the time transient, the stationary testing approach to measure bearing capacitance without complex control development or loading condition limitations. In addition, two types of motors were employed for experimental validation: an inside-out N-type PMSM was used for rotating testing and stationary testing, and an N-type BLDC was used for stationary testing. Possible solutions for the increased CMV and bearing currents caused by the implementation of WGB devices were discussed and developed in simulation validation, including multi-carrier SPWM modulation and H-8 converter topology