Thermal Characterization and Lifetime Prediction of LED Boards for SSL Lamp

This work presents a detailed 3-D thermo-mechanical modelling of two LED board technologies to compare their performance. LED board are considered to be used in high power 800 lumen retrofit SSL (Solid State Lighting) lamp. Thermal, mechanical and life time properties are evaluated by numerical modelling. Experimental results measured on fabricated LED board samples are compared to calculated data. Main role of LED board in SSL lamp is to transport heat from LED die to a heat sink and keep the thermal stresses in all layers as low as possible. The work focuses on improving of new LED board thermal management. Moreover, reliability and lifetime of LED board has been inspected by numerical calculation and validated by experiment. Thermally induced stress has been studied for wide temperature range that can affect the LED boards (-40 to +125°C). Numerical modelling of thermal performance, thermal stress distribution and lifetime has been carried out with ANSYS structural analysis where temperature dependent stress-strain material properties have been taken into account. The objective of this study is to improve not only the thermal performance of new LED board, but also identification of potential problems from mechanical fatigue point of view. Accelerated lifetime testing (e.g., mechanical) is carried out in order to study the failure behaviour of current and newly developed LED board

Study of intermetallic compound layer formation, growth and evaluation of shear strength of lead-free solder joints

Solder joints play a very important role in electronic products as the integrity of electronics packaging and assembly rests on the quality of these connections. The increasing demands for higher performance, lower cost, and miniaturisation in hand-held and consumer electronic products have led to the use of dense interconnections. This miniaturization trend means that solder joint reliability remains an important challenge with surface mount electronics assembly, especially those used in hostile environments, and applications such as automobile, aerospace and other safety critical operations. One of the most important factors which are known to affect solder joint reliability is the thickness of intermetallic compound (IMC) layer formed between the solder and the substrate. Although the formation of an IMC layer signifies good bonding between the solder and substrate, its main disadvantage is that it is also known to be the most brittle part of the solder joint. Thus as the miniaturisation trend continues, and solder joints become even smaller in size, the nature and impact of IMC layer thickness on solder joint reliability becomes even more of a concern with the introduction of new lead-free soldering. Other factors which are known to affect solder joint reliability include the bonding strength, the voiding percentage in joints, the size of the voids and their location within the joint. The work reported in this thesis on formation and growth of intermetallic compound layer, and evaluation of the shear strength of lead-free solder joints is divided into four main parts. The first part of the study is concerned with understanding of the effect of pad sizes on Inter-metallic compound layer formation and growth for lead-free solder joints. The second part concerns the study of the effect of temperature cycling and reflow profiles on intermetallic growth between Sn-Ag-Cu alloy and Cu substrate. The third part of the study concerns the investigation of the effect of reflow soldering profile optimization on solder volumes using design of experiment technique. The focus of the final part of the study is the investigation of the effect of Inter-metallic Compound thickness on shear strength of 1206 surface mount chip resistor. The results from the experimental work showed that the pad size has very little influence on the growth of the IMC. The result also shows that the growth of IMC depends on diffusion rate, temperature and time according to the power-law model; and that the IMC layer thickness is independent of pad size. The significance of this result is that with further reductions in joint size (with IMC layer thickness remaining the same), the ratio of the IMC layer thickness to solder joint size will increase and adversely impact the joint reliability. The work carried out on ageing temperatures and reflow profiles of Sn-Ag-Cu alloy and Cu substrate also showed the reaction-diffusion mechanism of intermetallic compound formation and growth in solder joints. The study also showed that the most significant factor in achieving lower IMC layer thickness and fine microstructures is the time to peak temperature of the reflow soldering process. The effect of IMC layer thickness on the shear strength of Sn-Ag-Cu solder joints was investigated. The relationship of shear strength, interfacial microstructures and fracture surfaces was considered. It is clear that formation of continuous Cu-Sn and SnNiCu layers are the reason for the weak interface strength. The results show that the shear strength of solder joints decreases with increasing ageing time. The results of this study have been disseminated through journal and conference publications and will be of interest to R&D personnel working in the area of high temperature electronics and in particular those working in the field of automotive electronics

A computational investigation of the effect of three-dimensional void morphology on the thermal resistance of solder thermal interface materials

Process-induced solder voids have three-dimensional shapes and show spatially random distribution with polydisperse geometric dimensions. There exists no analytical formulation of thermal resistances which incorporates void shapes, distribution and polydispersity variables. This paper uses finite element methods to investigate the effect of realistic void morphology on the thermal resistance of solder thermal interface materials (STIMs). The study has developed two computationally efficient methods for generating voids that show the features of real voids. Cylindrical and spherical void morphologies have been studied. The study is the first attempt, in literature, of characterizing the holistic effects of such realistic three-dimensional void morphologies on the thermal resistance of STIM layers. We have shown a qualitative agreement between our results and simplistic analytical predictions. However, the influence of void shapes, distribution and polydispersity have been shown to contribute to increased thermal resistances. The findings should provide significant insight to electrical/electronics engineers, micro-electronics chips manufacturers and academic research groups working on thermodynamics design of chip scale package (CSP) devices. It is also a framework for investigating objectively, the consequence of voids on the thermo-mechanical response of solder joints

MICROSTRUCTURAL CHARACTERIZATION AND THERMAL CYCLING RELIABILITY OF SOLDERS UNDER ISOTHERMAL AGING AND ELECTRICAL CURRENT

Solder joints on printed circuit boards provide electrical and mechanical connections between electronic devices and metallized patterns on boards. These solder joints are often the cause of failure in electronic packages. Solders age under storage and operational life conditions, which can include temperature, mechanical loads, and electrical current. Aging occurring at a constant temperature is called isothermal aging. Isothermal aging leads to coarsening of the bulk microstructure and increased interfacial intermetallic compounds at the solder-pad interface. The coarsening of the solder bulk degrades the creep properties of solders, whereas the voiding and brittleness of interfacial intermetallic compounds leads to mechanical weakness of the solder joint. Industry guidelines on solder interconnect reliability test methods recommend preconditioning the solder assemblies by isothermal aging before conducting reliability tests. The guidelines assume that isothermal aging simulates a "reasonable use period," but do not relate the isothermal aging levels with specific use conditions. Studies on the effect of isothermal aging on the thermal cycling reliability of tin-lead and tin-silver-copper solders are limited in scope, and results have been contradictory. The effect of electrical current on solder joints has been has mostly focused on current densities above 104A/cm2 with high ambient temperature (≥100oC), where electromigration, thermomigration, and Joule heating are the dominant failure mechanisms. The effect of current density below 104A/cm2 on temperature cycling fatigue of solders has not been established. This research provides the relation between isothermal aging and the thermal cycling reliability of select Sn-based solders. The Sn-based solders with 3%, 1%, and 0% silver content that have replaced tin-lead are studied and compared against tin-lead solder. The activation energy and growth exponents of the Arrhenius model for the intermetallic growth in the solders are provided. An aging metric to quantify the aging of solder joints, in terms of phase size in the solder bulk and interfacial intermetallic compound thickness at the solder-pad interface, is established. Based on the findings of thermal cycling tests on aged solder assemblies, recommendations are made for isothermal aging of solders before thermal cycling tests. Additionally, the effect of active electrical current at 103 A/cm2 on thermal cycling reliability is reported

Microstructural and mechanical characteristics of micro-scale intermetallic compounds interconnections

Following the continually increasing demand for high-density interconnection and multilayer packaging for chips, solder bump size has decreased significantly over the years, this has led to some challenges in the reliability of interconnects. This thesis presents research into the resulting effects of miniaturization on the interconnection with Sn-solder, especially focusing on the full intermetallics (IMCs) micro-joints which appear in the 3D IC stacking packaging. Thereby, systematic studies have been conducted to study the microstructural evolution and reliability issues of Cu-Sn and Cu-Sn-Ni IMCs micro-joints. (1) Phenomenon of IMCs planar growth: The planar IMCs interlayer was asymmetric and composed of (Cu,Ni)6Sn5 mainly in Ni/Sn (2.5~5 µm)/Cu interconnect. Meanwhile, it was symmetric two-layer structure in Cu/Sn (2.5~5 µm)/Cu interconnect with the Cu3Sn fine grains underneath Cu6Sn5 cobblestone-shape-like grains for each IMCs layer. Besides, it is worth noticing that the appearance of Cu-rich whiskers (the mixture of Cu/Cu2O/SnOx/Cu6Sn5) could potentially lead to short-circuit in the cases of ultra-fine (<10 µm pitch) interconnects for the miniaturization of electronics devices. (2) Microstructural evolution process of Cu-Sn IMCs micro-joint: The simultaneous solidification of IMCs interlayer supressed the scalloped growth of Cu6Sn5 grains in Cu/Sn (2.5 µm)/Cu interconnect during the transient liquid phase (TLP) soldering process. The growth factor of Cu3Sn was in the range of 0.29~0.48 in Cu-Cu6Sn5 diffusion couple at 240~290 °C, which was impacted significantly by the type of substrates. And the subsequent homogenization process of Cu3Sn grains was found to be consistent with the description of flux-driven ripening (FDR) theory. Moreover, Kirkendall voids appeared only in the Cu3Sn layer adjacent to Cu-plated substrate, and this porous Cu3Sn micro-joint was mechanically robust during the shear test. (3) Microstructural evolution of Cu-Sn-Ni IMCs micro-joint: There was obvious inter-reaction between the interfacial reactions in Ni/Sn (1.5 µm)/Cu interconnect. The growth factor of (Cu,Ni)3Sn on Cu side was about 0.36 at 240 °C, and the reaction product on Ni side was changed from Ni3Sn4 into (Cu,Ni)6Sn5 with the increase of soldering temperature. In particular, the segregation of Ni atoms occurred along with phase transformation at 290 °C and thereby stabilized the (Cu,Ni)6Sn5 phase for the high Ni content of 20 at.%. (4) Micro-mechanical characteristics of Cu-Sn-Ni IMCs micro-joint: The Young s modulus and hardness of Cu-Sn-Ni IMCs were measured by nanoindentation test, such as 160.6±3.1 GPa/ 7.34±0.14 GPa for (Cu,Ni)6Sn5 and 183.7±4.0 GPa/ 7.38±0.46 GPa for (Cu,Ni)3Sn, respectively. Besides, in-situ nano-compression tests have been conducted on IMCs micro-cantilevers, the fracture strength turns out to be 2.46 GPa. And also, the ultimate tensile stress was calculated to be 2.3±0.7 GPa from in-situ micro-bending tests, which is not sensitive with the microstructural change of IMCs after dwelling at 290 °C

Analysis of solder joint failures arisen during the soldering process

The paper gives an overview of the analysis methods applied by electronic failure analysis laboratories for detection, localization and in depth analysis of solder joint failures. The paper focuses on failures that arise during the soldering process. Besides the analysis methods case studies and a few failure modes together with their inspection and root causes are also described. Optical microscopy is used for sample documentation and failure localization. X-ray microimaging can be applied to non-destructively inspect hidden joints i.e. BGA (ball grid array), flip-chip, CSP (chip scale package) bump and micro-wire. It can be also used to measure the amount of solder or voids in the joints. Inspection of PWB (printed wiring board) tracks and via metallization can also be carried out by these systems. SAM (scanning acoustic microscopy) is an effective tool to detect and to visualize delaminations or cracks inside electronics packages or assemblies. As failures are in most cases retraceable to material or compo sitional problems, SEM (scanning electron microscopy) together with electron microprobe analysis can be applied to find the root cause of failures. Thorough analysis of a broken solder joint, wetting problem of cut surfaces, delamination and insufficient through-hole solder joints are presented in the paper. By these case studies not only the failure analysis procedure can be demonstrated, but also the root causes of these failures are revealed

種々の表面処理を行った鉛フリーハンダ接合部の機械的性質と信頼性

Tohoku University小池淳一課

Thermomechanical fatigue failure of interfaces in lead-free solders

The European Union Waste Electrical and Electronic Equipment Directive (WEEE) and Restriction of Hazardous Substances Directive (RoHS) banned lead from electronic systems from July 1, 2006 onwards, which has led to much interest in leadfree solders in the past years. Among several lead-free solder alternatives, SnAgCu is a widely accepted replacement due to its better creep-fatigue resistance and microstructural stability. SnAgCu has been extensively studied in the past decade, however, there are still issues to be resolved concerning solder reliability, the underlying mechanisms of thermo-mechanical fatigue failure, fatigue life predictions and the overall effect of decreasing component size, driven by the ongoing miniaturization trend. This thesis aims to scientifically contribute to this subject by a coupled experimental-numerical approach. In solder joint reliability, the bump/pad interface has a crucial role, the quality of which is determined by the metallization and interfacial defects. Solder balls, solder paste and cast eutectic SnAgCu are reflowed on Cu, Ni/Au and Cu/Ni(V)/Au metallization layers and the substrate influence on the bulk and interfacial metallurgy is examined. The damage propagation at SnAgCu soldered joints on Cu and Ni/Au substrates are investigated and microstructure related damage localization is identified as the dominant failure mechanism. Therefore, continuum damage approaches are believed to be inadequate for solder joint reliability predictions. Nano-indentation and tensile testing is used for the mechanical characterization of SnAgCu. An assessment on indentation parameters for solders is conducted and the influence of the Ag content on material properties of SnAgCu is presented. One of the main causes of ball grid array (BGA) failure is thermo-mechanical fatigue crack propagation in the solder, which is almost always observed at the bump/pad junction. Motivated by this fact, a combined experimental-numerical study on the cyclic mechanical response of SnAgCu/Ni-Au interface is conducted. In this study, damage evolution at the bond/pad interface is characterized by dedicated fatigue tests. Local deformations leading to crack propagation are simulated by separation of interfaces through a cohesive zone approach. Solder joints are tested under cyclic shear and cyclic tension for different specimen sizes and strain amplitudes. Two different damagemechanisms are observed: local deformations in the bulk and at the bonding interface. The interfacial failure mode is typically favored at a high initial stress, and a small solder volume. Crack propagation is simulated by an irreversible linear traction-separation cohesive zone law accompanied by a non-linear interfacial damage parameter. Later, tensile and shear experiments are used to characterize the cohesive zone parameters for the normal and the tangential opening, respectively. Interfacial fatigue damage in BGA solders is caused by the difference in coefficient of thermal expansion (CTE) of the materials in the package. Apart from this thermal incompatibility in the package, Sn based solders are themselves prone to thermal fatigue damage due to the intrinsic thermal anisotropy of the ß-Sn phase. Thermal fatigue causes local deformations especially at the grain boundaries. Hence, the thermal fatigue response of bulk SnAgCu is investigated as well. Bulk SnAgCu specimens are thermally cycled between -40 and 125¿C and mechanically tested afterwards in order to quantify the thermal fatigue damage. A size dependent cyclic softening behavior is observed. Test specimens are individually modeled including the microstructure and local crystallographic orientations, on the basis of orientation imaging scans (OIM). Both thermal cycling and tensile testing are imposed as boundary conditions. Reproducing the experimental results in the simulations, parameters of a cohesive zone based intergranular fatigue damagemodel are identified. Finally, the intergranular damage law characterized in this study is combined with the bump/pad interfacial damage law, and a 2Dmicrostructure-incorporated fatigue life prediction tool is established. Using this tool, it is shown that the failure mode of a soldered joint depends extensively on its geometry. The model presented above is extended to 3D for a more complete description of the problem. To provide the microstructural input, a database containing OIM scans of several SnAgCu solder balls is constructed. A missing constituent in the model so far, interfacial defects, i.e. voids, are examined statistically using newly manufactured BGA packages, revealing information on their size, position and frequency. Combining all the data collected, i.e. material properties, microstructure, defects, local damage laws, a 3D slice model from a BGA package is constructed. The slice model contains a single solder ball connecting the board and the chip. A series of case studies is created using experimental input such as different microstructures and initial defects allowing a statistical analysis. Fatigue life of these models are predicted and the results are validated by failure distribution analyses of BGA packages provided by the industry. Here the critical solder ball assumption is made: if a solder ball fails, the electrical circuit of the BGA package is open, thus the package fails. Setting a critical damage value for the interfaces accumulating fatigue damage, a good agreement with the experiments and simulations is obtained. It is seen that microstructural modeling allows to predict and understand the scatter in the solder ball fatigue life observed in reality. Finally, the effect of solder ball size and geometry on interconnect reliability is dis cussed on the basis of numerical analyses. For this purpose, a geometry factor and a microstructure factor is defined, and their influence on damage evolution is discusse

Thermomechanical fatigue failure of interfaces in lead-free solders

The European Union Waste Electrical and Electronic Equipment Directive (WEEE) and Restriction of Hazardous Substances Directive (RoHS) banned lead from electronic systems from July 1, 2006 onwards, which has led to much interest in leadfree solders in the past years. Among several lead-free solder alternatives, SnAgCu is a widely accepted replacement due to its better creep-fatigue resistance and microstructural stability. SnAgCu has been extensively studied in the past decade, however, there are still issues to be resolved concerning solder reliability, the underlying mechanisms of thermo-mechanical fatigue failure, fatigue life predictions and the overall effect of decreasing component size, driven by the ongoing miniaturization trend. This thesis aims to scientifically contribute to this subject by a coupled experimental-numerical approach. In solder joint reliability, the bump/pad interface has a crucial role, the quality of which is determined by the metallization and interfacial defects. Solder balls, solder paste and cast eutectic SnAgCu are reflowed on Cu, Ni/Au and Cu/Ni(V)/Au metallization layers and the substrate influence on the bulk and interfacial metallurgy is examined. The damage propagation at SnAgCu soldered joints on Cu and Ni/Au substrates are investigated and microstructure related damage localization is identified as the dominant failure mechanism. Therefore, continuum damage approaches are believed to be inadequate for solder joint reliability predictions. Nano-indentation and tensile testing is used for the mechanical characterization of SnAgCu. An assessment on indentation parameters for solders is conducted and the influence of the Ag content on material properties of SnAgCu is presented. One of the main causes of ball grid array (BGA) failure is thermo-mechanical fatigue crack propagation in the solder, which is almost always observed at the bump/pad junction. Motivated by this fact, a combined experimental-numerical study on the cyclic mechanical response of SnAgCu/Ni-Au interface is conducted. In this study, damage evolution at the bond/pad interface is characterized by dedicated fatigue tests. Local deformations leading to crack propagation are simulated by separation of interfaces through a cohesive zone approach. Solder joints are tested under cyclic shear and cyclic tension for different specimen sizes and strain amplitudes. Two different damagemechanisms are observed: local deformations in the bulk and at the bonding interface. The interfacial failure mode is typically favored at a high initial stress, and a small solder volume. Crack propagation is simulated by an irreversible linear traction-separation cohesive zone law accompanied by a non-linear interfacial damage parameter. Later, tensile and shear experiments are used to characterize the cohesive zone parameters for the normal and the tangential opening, respectively. Interfacial fatigue damage in BGA solders is caused by the difference in coefficient of thermal expansion (CTE) of the materials in the package. Apart from this thermal incompatibility in the package, Sn based solders are themselves prone to thermal fatigue damage due to the intrinsic thermal anisotropy of the ß-Sn phase. Thermal fatigue causes local deformations especially at the grain boundaries. Hence, the thermal fatigue response of bulk SnAgCu is investigated as well. Bulk SnAgCu specimens are thermally cycled between -40 and 125¿C and mechanically tested afterwards in order to quantify the thermal fatigue damage. A size dependent cyclic softening behavior is observed. Test specimens are individually modeled including the microstructure and local crystallographic orientations, on the basis of orientation imaging scans (OIM). Both thermal cycling and tensile testing are imposed as boundary conditions. Reproducing the experimental results in the simulations, parameters of a cohesive zone based intergranular fatigue damagemodel are identified. Finally, the intergranular damage law characterized in this study is combined with the bump/pad interfacial damage law, and a 2Dmicrostructure-incorporated fatigue life prediction tool is established. Using this tool, it is shown that the failure mode of a soldered joint depends extensively on its geometry. The model presented above is extended to 3D for a more complete description of the problem. To provide the microstructural input, a database containing OIM scans of several SnAgCu solder balls is constructed. A missing constituent in the model so far, interfacial defects, i.e. voids, are examined statistically using newly manufactured BGA packages, revealing information on their size, position and frequency. Combining all the data collected, i.e. material properties, microstructure, defects, local damage laws, a 3D slice model from a BGA package is constructed. The slice model contains a single solder ball connecting the board and the chip. A series of case studies is created using experimental input such as different microstructures and initial defects allowing a statistical analysis. Fatigue life of these models are predicted and the results are validated by failure distribution analyses of BGA packages provided by the industry. Here the critical solder ball assumption is made: if a solder ball fails, the electrical circuit of the BGA package is open, thus the package fails. Setting a critical damage value for the interfaces accumulating fatigue damage, a good agreement with the experiments and simulations is obtained. It is seen that microstructural modeling allows to predict and understand the scatter in the solder ball fatigue life observed in reality. Finally, the effect of solder ball size and geometry on interconnect reliability is dis cussed on the basis of numerical analyses. For this purpose, a geometry factor and a microstructure factor is defined, and their influence on damage evolution is discusse