7 research outputs found
The formal verification of the ctm approach to forcing
We discuss some highlights of our computer-verified proof of the
construction, given a countable transitive set-model of , of
generic extensions satisfying and
. Moreover, let be the set of instances
of the Axiom of Replacement. We isolated a 21-element subset
and defined
such that for every
and -generic , implies , where is Zermelo set theory
with Choice.
To achieve this, we worked in the proof assistant Isabelle, basing our
development on the Isabelle/ZF library by L. Paulson and others.Comment: 20pp + 14pp in bibliography & appendices, 2 table
Contracts for Systems Design: Theory
Aircrafts, trains, cars, plants, distributed telecommunication military or health care systems,and more, involve systems design as a critical step. Complexity has caused system design times and coststo go severely over budget so as to threaten the health of entire industrial sectors. Heuristic methods andstandard practices do not seem to scale with complexity so that novel design methods and tools based on astrong theoretical foundation are sorely needed. Model-based design as well as other methodologies suchas layered and compositional design have been used recently but a unified intellectual framework with acomplete design flow supported by formal tools is still lacking.Recently an âorthogonalâ approach has been proposed that can be applied to all methodologies introducedthus far to provide a rigorous scaffolding for verification, analysis and abstraction/refinement: contractbaseddesign. Several results have been obtained in this domain but a unified treatment of the topic that canhelp in putting contract-based design in perspective is missing. This paper intends to provide such treatmentwhere contracts are precisely defined and characterized so that they can be used in design methodologiessuch as the ones mentioned above with no ambiguity. In addition, the paper provides an important linkbetween interface and contract theories to show similarities and correspondences.This paper is complemented by a companion paper where contract based design is illustrated throughuse cases
Forschungsbericht UniversitÀt Mannheim 2006 / 2007
Sie erhalten darin zum einen zusammenfassende Darstellungen zu den Forschungsschwerpunkten und Forschungsprofilen der UniversitĂ€t und deren Entwicklung in der Forschung. Zum anderen gibt der Forschungsbericht einen Ăberblick ĂŒber die Publikationen und Forschungsprojekte der LehrstĂŒhle, Professuren und zentralen Forschungseinrichtungen. Diese werden ergĂ€nzt um Angaben zur Organisation von Forschungsveranstaltungen, der Mitwirkung in ForschungsausschĂŒssen, einer Ăbersicht zu den fĂŒr Forschungszwecke eingeworbenen Drittmitteln, zu den Promotionen und Habilitationen, zu Preisen und Ehrungen und zu Förderern der UniversitĂ€t Mannheim. Darin zeigt sich die Bandbreite und Vielseitigkeit der ForschungsaktivitĂ€ten und deren Erfolg auf nationaler und internationaler Ebene
Design and implementation of WCET analyses : including a case study on multi-core processors with shared buses
For safety-critical real-time embedded systems, the worst-case execution time (WCET) analysis â determining an upper bound on the possible execution times of a program â is an important part of the system verification. Multi-core processors share resources (e.g. buses and caches) between multiple processor cores and, thus, complicate the WCET analysis as the execution times of a program executed on one processor core significantly depend on the programs executed in parallel on the concurrent cores. We refer to this phenomenon as shared-resource interference. This thesis proposes a novel way of modeling shared-resource interference during WCET analysis. It enables an efficient analysis â as it only considers one processor core at a time â and it is sound for hardware platforms exhibiting timing anomalies. Moreover, this thesis demonstrates how to realize a timing-compositional verification on top of the proposed modeling scheme. In this way, this thesis closes the gap between modern hardware platforms, which exhibit timing anomalies, and existing schedulability analyses, which rely on timing compositionality. In addition, this thesis proposes a novel method for calculating an upper bound on the amount of interference that a given processor core can generate in any time interval of at most a given length. Our experiments demonstrate that the novel method is more precise than existing methods.Die Analyse der maximalen AusfĂŒhrungszeit (Worst-Case-Execution-Time-Analyse, WCET-Analyse) ist fĂŒr eingebettete Echtzeit-Computer-Systeme in sicherheitskritischen Anwendungsbereichen unerlĂ€sslich. Mehrkernprozessoren erschweren die WCET-Analyse, da einige ihrer Hardware-Komponenten von mehreren Prozessorkernen gemeinsam genutzt werden und die AusfĂŒhrungszeit eines Programmes somit vom Verhalten mehrerer Kerne abhĂ€ngt. Wir bezeichnen dies als Interferenz durch gemeinsam genutzte Komponenten. Die vorliegende Arbeit schlĂ€gt eine neuartige Modellierung dieser Interferenz wĂ€hrend der WCET-Analyse vor. Der vorgestellte Ansatz ist effizient und fĂŒhrt auch fĂŒr Computer-Systeme mit Zeitanomalien zu korrekten Ergebnissen. DarĂŒber hinaus zeigt diese Arbeit, wie ein zeitkompositionales Verfahren auf Basis der vorgestellten Modellierung umgesetzt werden kann. Auf diese Weise schlieĂt diese Arbeit die LĂŒcke zwischen modernen Mikroarchitekturen, die Zeitanomalien aufweisen, und den existierenden Planbarkeitsanalysen, die sich alle auf die KompositionalitĂ€t des Zeitverhaltens verlassen. AuĂerdem stellt die vorliegende Arbeit ein neues Verfahren zur Berechnung einer oberen Schranke der Menge an Interferenz vor, die ein bestimmter Prozessorkern in einem beliebigen Zeitintervall einer gegebenen LĂ€nge höchstens erzeugen kann. Unsere Experimente zeigen, dass das vorgestellte Berechnungsverfahren prĂ€ziser ist als die existierenden Verfahren.Deutsche Forschungsgemeinschaft (DFG) as part of the Transregional Collaborative Research Centre SFB/TR 14 (AVACS