A performance evaluation of the IBM 370/XT personal computer

An evaluation of the IBM 370/XT personal computer is given. This evaluation focuses primarily on the use of the 370/XT for scientific and technical applications and applications development. A measurement of the capabilities of the 370/XT was performed by means of test programs which are presented. Also included is a review of facilities provided by the operating system (VM/PC), along with comments on the IBM 370/XT hardware configuration

Maclisp extensions

A common subset of selected facilities available in Maclisp and its derivatives (PDP-10 and Multics Maclisp, Lisp Machine Lisp (Zetalisp), and NIL) is decribed. The object is to add in writing code which can run compatibly in more than one of these environments

Garbage Collection in a Very Large Address Space

This research was done at the Artificial Intelligence Laboratory of the Massachusetts Institute of Technology and was supported by the Office of Naval Research under contract number N00014-75-C-0522.The address space is broken into areas that can be garbage collected separately. An area is analogous to a file on current systems. Each process has a local computation area for its stack and temporary storage that is roughly analogous to a job core image. A mechanism is introduced for maintaining lists of inter-area links, the key to separate garbage collection. This mechanism is designed to be placed in hardware and does not create much overhead. It could be used in a practical computer system that uses the same address space for all users for the life of the system. It is necessary for the hardware to implement a reference count scheme that is adequate for handling stack frames. The hardware also facilitates implementation of protection by capabilities without the use of unique codes. This is due to elimination of dangling references. Areas can be deleted without creating dangling references.MIT Artificial Intelligence Laboratory Department of Defense Office of Naval Researc

Integrating Segmentation and Paging Protection for Safe, Efficient and Transparent Software Extensions

The technological evolution towards extensible software architectures and component-based software development demands safe, efficient, flexible, and easy-touse extension mechanisms to provide protection among software modules residing in the same address space. While a number of software-based approaches have been proposed in the last several years, no clear winner emerges that satisfactorily addresses all the design issues involved in establishing multiple protection domains within an address space. This paper describes the design, implementation, and evaluation of a novel intra-address space protection mechanism called Palladium, which is built upon the combined segmentation and paging protection hardware provided by Intel's X86 architecture. Based on the considerations on application programming and systems implementation complexity, we chose to use slightly different approaches to implement the user-level and kernel-level extension mechanisms. To demonstrate the resulting prototyp..

Data management system study Final technical report, 15 May 1967 - 31 Mar. 1968

Systems design of prototype coherent system to meet data processing requirements of post-Apollo mission

Advanced data management system analysis techniques study

The state of the art of system analysis is reviewed, emphasizing data management. Analytic, hardware, and software techniques are described

A unified data flow model for fault tolerant computers

The Dataflow Simulation System (DFSS) at USL was used as the medium on which a functional simulaton of sIFT was produced. DFSS is written in PL/I and is supported by MULTICS. Within the simulation, all the interprocessor communication, fault simulation, system state data, and monitoring were implemented in dataflow and supported directly by DFSS. The actual processor level computation was carried out by the SIFT code in PASCAL. The interface between DFSS in PL/I and the SIFT code in PASCAL was supported under a mechanism in DFSS called a Node Realization Module (NRM)

Development of an MSC language and compiler, volume 1

Higher order programming language and compiler for advanced computer software system to be used with manned space flights between 1972 and 198

Segmented-virtual Memory Design for an Algol 68 Compiler

This thesis is a description of a design for an ALGOL 68 run-time organization. The design relies heavily on a segmented-virtual memory scheme for simulating a large memory store and handling memory management requests.Computing and Information Science

Asynchronous cooperative multiprocessing within MULTICS.

Massachusetts Institute of Technology. Dept. of Electrical Engineering. Thesis. 1968. E.E.Bibliography: leaf 91.E.E