67 research outputs found

    Organic Log-Domain Integrator Synapse

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    Synapses play a critical role in memory, learning, and cognition. Their main functions include converting presynaptic voltage spikes to postsynaptic currents, as well as scaling the input signal. Several brain-inspired architectures have been proposed to emulate the behavior of biological synapses. While these are useful to explore the properties of nervous systems, the challenge of making biocompatible and flexible circuits with biologically plausible time constants and tunable gain remains. Here, a physically flexible organic log-domain integrator synaptic circuit is shown to address this challenge. In particular, the circuit is fabricated using organic-based materials that are electrically active, offer flexibility and biocompatibility, as well as time constants (critical in learning neural codes and encoding spatiotemporal patterns) that are biologically plausible. Using a 10 nF synaptic capacitor, the time constant reached 126 and 221 ms before and during bending, respectively. The flexible synaptic circuit is characterized before and during bending, followed with studies on the effects of weighting voltage, synaptic capacitance, and disparity in presynaptic signals on the time constant

    A tutorial on the characterisation and modelling of low layer functional splits for flexible radio access networks in 5G and beyond

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    The centralization of baseband (BB) functions in a radio access network (RAN) towards data processing centres is receiving increasing interest as it enables the exploitation of resource pooling and statistical multiplexing gains among multiple cells, facilitates the introduction of collaborative techniques for different functions (e.g., interference coordination), and more efficiently handles the complex requirements of advanced features of the fifth generation (5G) new radio (NR) physical layer, such as the use of massive multiple input multiple output (MIMO). However, deciding the functional split (i.e., which BB functions are kept close to the radio units and which BB functions are centralized) embraces a trade-off between the centralization benefits and the fronthaul costs for carrying data between distributed antennas and data processing centres. Substantial research efforts have been made in standardization fora, research projects and studies to resolve this trade-off, which becomes more complicated when the choice of functional splits is dynamically achieved depending on the current conditions in the RAN. This paper presents a comprehensive tutorial on the characterisation, modelling and assessment of functional splits in a flexible RAN to establish a solid basis for the future development of algorithmic solutions of dynamic functional split optimisation in 5G and beyond systems. First, the paper explores the functional split approaches considered by different industrial fora, analysing their equivalences and differences in terminology. Second, the paper presents a harmonized analysis of the different BB functions at the physical layer and associated algorithmic solutions presented in the literature, assessing both the computational complexity and the associated performance. Based on this analysis, the paper presents a model for assessing the computational requirements and fronthaul bandwidth requirements of different functional splits. Last, the model is used to derive illustrative results that identify the major trade-offs that arise when selecting a functional split and the key elements that impact the requirements.This work has been partially funded by Huawei Technologies. Work by X. Gelabert and B. Klaiqi is partially funded by the European Union's Horizon Europe research and innovation programme (HORIZON-MSCA-2021-DN-0) under the Marie Skłodowska-Curie grant agreement No 101073265. Work by J. Perez-Romero and O. Sallent is also partially funded by the Smart Networks and Services Joint Undertaking (SNS JU) under the European Union’s Horizon Europe research and innovation programme under Grant Agreements No. 101096034 (VERGE project) and No. 101097083 (BeGREEN project) and by the Spanish Ministry of Science and Innovation MCIN/AEI/10.13039/501100011033 under ARTIST project (ref. PID2020-115104RB-I00). This last project has also funded the work by D. Campoy.Peer ReviewedPostprint (author's final draft

    Study and implementation of a digital control of dual-gated electrolyte-gated organic field-effect transistors for cell stimulation and recording

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    openL’elettronica organica sta diventando particolarmente attraente per le applicazioni di biosensing, grazie ai suoi vantaggi come il basso costo dei materiali e dei processi di fabbricazione, la biocompatibilità e l’alta sensibilità. I transistor organici ad effetto di campo con gate elettrolitico (EGOFETs) sono stati ampiamente studiati negli ultimi anni in questo campo, per la loro peculiare abilità di operare a tensioni molto basse, grazie all’elevata apacità di double-layer che si ottiene all’interfaccia con l’elettrolita. Tuttavia, il contatto con l’ossigeno e l’umidità in soluzioni acquose è dannoso per le funzionalità del transistor, modificandone le caratteristiche elettriche (variazione della tensione di soglia) e degradandolo. Questa tesi si concentra sulla stabilizzazione del punto operativo dell’EGOFET, attraverso lo sviluppo di un controllo digitale che sfrutta un gate aggiuntivo per controllare la tensione di soglia del canale di conduzione liquid-gated. Abbiamo costruito un sistema di controllo completo che permette di ottenere un segnale di uscita ben definito per misure a lungo termine. In particolare, abbiamo mirato alla registrazione e alla stimolazione di segnali extracellulari, testando diversi metodi per rilevare e preservare ipotetici segnali di potenziale d’azione. Tutte le configurazioni sono state testate da simulazioni e prove sperimentali. Il controllo digitale include strumenti di autotuning per fornire robustezza rispetto al degrado delle proprietà dei dispositivi. Diversi parametri del sistema di controllo possono essere tarati a seconda delle priorità che vogliamo prendere in considerazione. Per quanto riguarda una futura implementazione con cellule reali, sono stati provati diversi rivestimenti per la semina delle cellule, al fine di analizzare il loro effetto sulle proprietà elettriche. I dispositivi rivestiti conservati in aria hanno mostrato un comportamento a effetto campo per circa un mese. Questa tesi fa parte di un progetto più ampio chiamato Project Proactive 2018 "Fully printed organic array of bidirectional reference-less sensors for neuronal interfacing", led by the Principal Investigator Prof. Andrea Cester, in collaborazione con: • VIMM Veneto Institute of Molecular Medicine • DiSC Dipartimento di Scienze Chimiche, UNIPD • ICMAB Institut de Ciència de Materials de BarcelonaOrganic electronics is becoming particularly attractive for biosensing applications, thanks to its advantages such as low-cost materials and fabrication processes, biocompatibility and high sensitivity. Electrolyte-Gated Organic Field Effect Transistors (EGOFETs) have been widely investigated in recent years in this field, due to their peculiar ability to operate at very low voltages, thanks to the high double-layer capacitance given by the interfaces with the electrolyte. However, the contact with oxygen and humidity in acqueous environment is detrimental for the functionality of the transistor, changing its electrical characteristics (threshold voltage shift) and degradating it. This dissertation is focused on the stabilization of the operating point of the EGOFET, by means of the development of a digital control that exploits an additional gate to control the threshold voltage of the liquid-gated conduction channel. We built up a complete control system that allows to achieve a well-defined output signal for long term measurements. In particular, we targeted extracellular recording and stimulation, by testing different methods to detect and preserve hypothetical action potential signals. All the configurations have been tested by simulations and experimental evidences. The digital control includes autotuning tools to give robustness to the degradation of the devices properties. Several parameters of the control system can be tuned depending on the priorities we want to take into account. With regard to a future implementation with real cells, different coatings for cell seeding have been tried, in order to analyze their effect on the electrical properties. The coated devices stored in air showed a field-effect behaviour for approximately one month. This thesis is part of a broader project called Project Proactive 2018 "Fully printed organic array of bidirectional reference-less sensors for neuronal interfacing", led by the Principal Investigator Prof. Andrea Cester, in collaboration with: • VIMM Veneto Institute of Molecular Medicine • DiSC Dipartimento di Scienze Chimiche, UNIPD • ICMAB Institut de Ciència de Materials de Barcelon

    APPROXIMATE COMPUTING BASED PROCESSING OF MEA SIGNALS ON FPGA

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    The Microelectrode Array (MEA) is a collection of parallel electrodes that may measure the extracellular potential of nearby neurons. It is a crucial tool in neuroscience for researching the structure, operation, and behavior of neural networks. Using sophisticated signal processing techniques and architectural templates, the task of processing and evaluating the data streams obtained from MEAs is a computationally demanding one that needs time and parallel processing.This thesis proposes enhancing the capability of MEA signal processing systems by using approximate computing-based algorithms. These algorithms can be implemented in systems that process parallel MEA channels using the Field Programmable Gate Arrays (FPGAs). In order to develop approximate signal processing algorithms, three different types of approximate adders are investigated in various configurations. The objective is to maximize performance improvements in terms of area, power consumption, and latency associated with real-time processing while accepting lower output accuracy within certain bounds. On FPGAs, the methods are utilized to construct approximate processing systems, which are then contrasted with the precise system. Real biological signals are used to evaluate both precise and approximative systems, and the findings reveal notable improvements, especially in terms of speed and area. Processing speed enhancements reach up to 37.6%, and area enhancements reach 14.3% in some approximate system modes without sacrificing accuracy. Additional cases demonstrate how accuracy, area, and processing speed may be traded off. Using approximate computing algorithms allows for the design of real-time MEA processing systems with higher speeds and more parallel channels. The application of approximate computing algorithms to process biological signals on FPGAs in this thesis is a novel idea that has not been explored before

    Neuromorphic Systems for Pattern Recognition and Uav Trajectory Planning

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    Detection and control are two essential components in an intelligent system. This thesis investigates novel techniques in both areas with a focus on the applications of handwritten text recognition and UAV flight control. Recognizing handwritten texts is a challenging task due to many different writing styles and lack of clear boundary between adjacent characters. The difficulty is greatly increased if the detection algorithms is solely based on pattern matching without information of dynamics of handwriting trajectories. Motivated by the aforementioned challenges, this thesis first investigates the pattern recognition problem. We use offline handwritten texts recognition as a case study to explore the performance of a recurrent belief propagation model. We first develop a probabilistic inference network to post process the recognition results of deep Convolutional Neural Network (CNN) (e.g. LeNet) and collect individual characters to form words. The output of the inference network is a set of words and their probability. A series of post processing and improvement techniques are then introduced to further increase the recognition accuracy. We study the performance of proposed model through various comparisons. The results show that it significantly improves the accuracy by correcting deletion, insertion and replacement errors, which are the main sources of invalid candidate words. Deep Reinforcement Learning (DRL) has widely been applied to control the autonomous systems because it provides solutions for various complex decision-making tasks that previously could not be solved solely with deep learning. To enable autonomous Unmanned Aerial Vehicles (UAV), this thesis presents a two-level trajectory planning framework for UAVs in an indoor environment. A sequence of waypoints is selected at the higher-level, which leads the UAV from its current position to the destination. At the lower-level, an optimal trajectory is generated analytically between each pair of adjacent waypoints. The goal of trajectory generation is to maintain the stability of the UAV, and the goal of the waypoints planning is to select waypoints with the lowest control thrust throughout the entire trip while avoiding collisions with obstacles. The entire framework is implemented using DRL, which learns the highly complicated and nonlinear interaction between those two levels, and the impact from the environment. Given the pre-planned trajectory, this thesis further presents an actor-critic reinforcement learning framework that realizes continuous trajectory control of the UAV through a set of desired waypoints. We construct a deep neural network and develop reinforcement learning for better trajectory tracking. In addition, Field Programmable Gate Arrays (FPGA) based hardware acceleration is designed for energy efficient real-time control. If we are to integrate the trajectory planning model onto a UAV system for real-time on-board planning, a key challenge is how to deliver required performance under strict memory and computational constraints. Techniques that compress Deep Neural Network (DNN) models attract our attention because they allow optimized neural network models to be efficiently deployed on platforms with limited energy and storage capacity. However, conventional model compression techniques prune the DNN after it is fully trained, which is very time-consuming especially when the model is trained using DRL. To overcome the limitation, we present an early phase integrated neural network weight compression system for DRL based waypoints planning. By applying pruning at an early phase, the compression of the DRL model can be realized without significant overhead in training. By tightly integrating pruning and retraining at the early phase, we achieve a higher model compression rate, reduce more memory and computing complexity, and improve the success rate compared to the original work

    Designing with Iontronic Logic Gates -- From a Single Polyelectrolyte Diode to Small Scale Integration

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    This article presents the implementation of on-chip iontronic circuits via small-scale integration of multiple ionic logic gates made of bi-polar polyelectrolyte diodes. These ionic circuits are analogous to solid-state electronic circuits, with ions as the charge carriers instead of electrons/holes. We experimentally characterize the responses of a single fluidic diode made of a junction of oppositely charged polyelectrolytes (i.e., anion and cation exchange membranes), with a similar underlying mechanism as a solid-state p- and n-type junction. This served to carry out pre-designed logical computations in various architectures by integrating multiple diode-based logic gates, where the electrical signal between the integrated gates was transmitted entirely through ions. The findings shed light on the limitations affecting the number of logic gates that can be integrated, the degradation of the electrical signal, their transient response, and the design rules that can improve the performance of iontronic circuits

    Integrated Circuits/Microchips

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    With the world marching inexorably towards the fourth industrial revolution (IR 4.0), one is now embracing lives with artificial intelligence (AI), the Internet of Things (IoTs), virtual reality (VR) and 5G technology. Wherever we are, whatever we are doing, there are electronic devices that we rely indispensably on. While some of these technologies, such as those fueled with smart, autonomous systems, are seemingly precocious; others have existed for quite a while. These devices range from simple home appliances, entertainment media to complex aeronautical instruments. Clearly, the daily lives of mankind today are interwoven seamlessly with electronics. Surprising as it may seem, the cornerstone that empowers these electronic devices is nothing more than a mere diminutive semiconductor cube block. More colloquially referred to as the Very-Large-Scale-Integration (VLSI) chip or an integrated circuit (IC) chip or simply a microchip, this semiconductor cube block, approximately the size of a grain of rice, is composed of millions to billions of transistors. The transistors are interconnected in such a way that allows electrical circuitries for certain applications to be realized. Some of these chips serve specific permanent applications and are known as Application Specific Integrated Circuits (ASICS); while, others are computing processors which could be programmed for diverse applications. The computer processor, together with its supporting hardware and user interfaces, is known as an embedded system.In this book, a variety of topics related to microchips are extensively illustrated. The topics encompass the physics of the microchip device, as well as its design methods and applications
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