Parameter space of experimental chaotic circuits with high-precision control parameters

ACKNOWLEDGMENTS The authors thank Professor Iberê Luiz Caldas for the suggestions and encouragement. The authors F.F.G.d.S., R.M.R., J.C.S., and H.A.A. acknowledge the Brazilian agency CNPq and state agencies FAPEMIG, FAPESP, and FAPESC, and M.S.B. also acknowledges the EPSRC Grant Ref. No. EP/I032606/1.Peer reviewedPublisher PD

Fully CMOS Memristor Based Chaotic Circuit

This paper demonstrates the design of a fully CMOS chaotic circuit consisting of only DDCC based memristor and inductance simulator. Our design is composed of these active blocks using CMOS 0.18 µm process technology with symmetric ±1.25 V supply voltages. A new single DDCC+ based topology is used as the inductance simulator. Simulation results verify that the design proposed satisfies both memristor properties and the chaotic behavior of the circuit. Simulations performed illustrate the success of the proposed design for the realization of CMOS based chaotic applications

CMOS design of chaotic oscillators using state variables: a monolithic Chua's circuit

This paper presents design considerations for monolithic implementation of piecewise-linear (PWL) dynamic systems in CMOS technology. Starting from a review of available CMOS circuit primitives and their respective merits and drawbacks, the paper proposes a synthesis approach for PWL dynamic systems, based on state-variable methods, and identifies the associated analog operators. The GmC approach, combining quasi-linear VCCS's, PWL VCCS's, and capacitors is then explored regarding the implementation of these operators. CMOS basic building blocks for the realization of the quasi-linear VCCS's and PWL VCCS's are presented and applied to design a Chua's circuit IC. The influence of GmC parasitics on the performance of dynamic PWL systems is illustrated through this example. Measured chaotic attractors from a Chua's circuit prototype are given. The prototype has been fabricated in a 2.4- mu m double-poly n-well CMOS technology, and occupies 0.35 mm/sup 2/, with a power consumption of 1.6 mW for a +or-2.5-V symmetric supply. Measurements show bifurcation toward a double-scroll Chua's attractor by changing a bias current

Simple 4d – Hyperchaotic Canonical Van der pol Duffing Oscillator using Current Feedback Op-Amp

In this paper, in order to show some interesting phenomena of fourth-order hyperchaotic Canonical Van der Pol Duffing oscillator circuit with a smooth cubic nonlinearity, different kinds of attractors, time waveforms and corresponding Lyapunov exponent spectra of systems are presented, respectively. The perturbation transforms an unpredictable hyperchaotic behavior into a predictable hyperchaotic or periodic motion via stabilization of unstable, aperiodic, or periodic orbits of the strange hyperchaotic attractor. One advantage of the method is its robustness against noise. A theoretical analysis of the circuit equations is presented, along with experimental simulation and numerical results

Comment: Is memristor a dynamic element?

The authors present a charge/flux formulation of the equations of memristive circuits, which seemingly show that the memristor should not be considered as a dynamic circuit element. Here, is shown that this approach implicitly reduces the dynamic analysis to a certain subset of the state space in such a way that the dynamic contribution of memristors is hidden. This reduction might entail a substantial loss of information, regarding e.g. the local stability properties of the circuit. Two examples illustrate this. It is concluded that the memristor, even with its unconventional features, must be considered as a dynamic element

Improved implementation of Chua's chaotic oscillator using current feedback op amp

An improved implementation of Chua's chaotic oscillator is proposed. The new realization combines attractive features of the current feedback op amp (CFOA) operating in both voltage and current modes to construct the active three-segment voltage-controlled nonlinear resistor. Several enhancements are achieved: the component count is reduced and the chaotic spectrum is extended to higher frequencies. In addition, a buffered and isolated voltage output directly representing a state variable is made available. Based on a linearized model of Chua's circuit, the useful tuning range of the major bifurcation parameter (G) and the expected frequency of oscillation, are estimate

Chua's Circuit in Spread Spectrum Communication Systems

Communication system via chaotic modulations is demonstrated. It contains the well-known chaotic circuits as its basic elements - Chua's circuits. The proposed system has some standard properties of spread spectrum communication. The following advantage is found in simulations: a) Transmitted signals have broad spectra. b) Secure communications are possible in the sense that the better parameter matching is required in order to recover the signal. c) The circuit structure of the communication system is most simple and communication systems are easily built at a small outlay. Finally computer simulations are given to examine the validity of this system

Digital chaos synchronization in optical networks

A possible approach to the synchronization of chaotic circuits is reported. It is based on an Optically Programmable Logic Cell and as a consequence its output is digital, its application to cryptography in Optical Communications comes directly from its properties. The model here presented is based on a computer simulation