VisibleZ: A Mainframe Architecture Emulator for Computing Education

This paper describes a PC-based mainframe computer emulator called VisibleZ and its use in teaching mainframe Computer Organization and Assembly Programming classes. VisibleZ models IBM’s z/Architecture and allows direct interpretation of mainframe assembly language object code in a graphical user interface environment that was developed in Java. The VisibleZ emulator acts as an interactive visualization tool to simulate enterprise computer architecture. The provided architectural components include main storage, CPU, registers, Program Status Word (PSW), and I/O Channels. Particular attention is given to providing visual clues to the user by color-coding screen components, machine instruction execution, and animation of the machine architecture components. Students interact with VisibleZ by executing machine instructions in a step-by-step mode, simultaneously observing the contents of memory, registers, and changes in the PSW during the fetch-decode-execute machine instruction cycle. The object-oriented design and implementation of VisibleZ allows students to develop their own instruction semantics by coding Java for existing specific z/Architecture machine instructions or design and implement new machine instructions. The use of VisibleZ in lectures, labs, and assignments is described in the paper and supported by a website that hosts an extensive collection of related materials. VisibleZ has been proven a useful tool in mainframe Assembly Language Programming and Computer Organization classes. Using VisibleZ, students develop a better understanding of mainframe concepts, components, and how the mainframe computer works. ACM Computing Classification System (1998): C.0, K.3.2

Processor Modules for the Classroom Development of Physical Computers

Processors are present in almost all the electronic components available in the market now. As they perform trillions of operations per second and are complex internally. This project is to build building modules for students, who will be able to develop their own processor. The main idea is that this will help students to experience the detailed workflow of a processor and focus on design and development instead of spending time on wiring and soldering. Different components such as Program Counter, Instruction Register, Memory, Multiplexer, Adder and transceivers are designed and printed as individual modules on printed circuit boards (PCB’s). Eagle tool is used to design the individual circuit modules and after physically testing the design using electronic hardware, the designs are sent to the PCB manufacturer. After they are received, boards are soldered with the appropriate electronic components and tested again as a block. These building blocks are given to a group of both computer science and non-computer science students for feedback. This will be a productive teaching approach for Computer Architecture and related courses

A screen oriented simulator for a DEC PDP-8 computer

This note describes a simulator for the DEC PDP-8 computer. The simulator is intended as an aid tor students starting to learn assembly language programming. It utilises the simple graphIcs capabilities of the terminals in the department\u27s laboratories to present. on the termInal screen. a view of the operations of the simulated computer. The complete system comprises two versions at me program two simulating a PDP-8 computer and a simplified assembler tor preparIng students\u27 programs for execution. There are also a number of example PDP-8 programs illustrating partiCUlar aspects of that computer

Connectionist models and figurative speech

This paper contains an introduction to connectionist models. Then we focus on the question of how novel figurative usages of descriptive adjectives may be interpreted in a structured connectionist model of conceptual combination. The suggestion is that inferences drawn from an adjective\u27s use in familiar contexts form the basis for all possible interpretations of the adjective in a novel context. The more plausible of the possibilities, it is speculated, are reinforced by some form of one-shot learning, rendering the interpretative process obsolete after only one (memorable) encounter with a novel figure of speech

Improving Student Comprehension Through Interactive Microarchitecture Simulation and Visualization

The curricula of most Computer Science departments include at least one course on computer organization and assembly language. The seminal concepts covered by such courses bridge the gap between hardware and software by introducing multiple layers of abstraction. Appalachian State University introduces this material in the course “Introduction to Computer Systems.” The course uses the hypothetical LC-3 processor, as presented in Patt and Patel’s textbook “Introduction to Computing Systems: From Bits & Gates to C & Beyond (2nd edition).” Prior to the completion of the work presented in this thesis, tools existed for the assembly of LC-3 programs and simulation of the assembled code; however, no simulator existed to demonstrate the function of the microarchitectural level. In this thesis, research on educational simulators is presented, with an emphasis on microarchitectural and graphical style simulators. Multiple simulators were reviewed to determine which elements are pedagogically e?ective. Based on these ?ndings, a graphical microarchitecture simulator named lc3uarch was implemented. The simulator targets the microarchitectural level of the LC-3 processor. Student surveys responses indicated that the use of lc3uarch can help students comprehend the logic components of the LC-3 microarchitecture and provided ideas for making the tool more e?ective

A Research-Oriented Course on Advanced Multicore Architecture

©2015 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.Multicore processors have become ubiquitous in our real life in devices like smartphones, tablets, etc. In fact, they are present in almost all segments of the computing market, from supercomputers to embedded devices. The huge market competence have lead industry and academia to develop vertiginous technological and architectural advances. The fast evolution that are still experiencing current multicores makes difficult for instructors to offer computer architecture courses with updated contents, preferably showing the industry and academia research trends. To deal with this shortcoming, authors consider that a research-oriented course is the most appropriate solution. This paper presents an advanced computer architecture course called Advanced Multicore Architectures, offered in 2015. The course covers the basic topics of multicore architecture and has been organized in four main modules regarding multicore basis, performance evaluation, advanced caching, and main memory organization. The course follows a research-oriented approach that covers theoretical concepts at lectures in which recent research papers are analyzed to provide students a wide view of current trends. Moreover, additional teaching methods like lab sessions with a state-of-the-art multicore simulator or research-oriented exercises have been used with the aim of introducing students to research in these topics. To achieve this fully research-oriented methodology, about 40% of the time is devoted to labs and exercises.This work was supported by the Spanish Ministerio de Economía y Competitividad (MINECO) and by FEDER funds under Grant TIN2012-38341-C04-01, and by the Intel Early Career Faculty Honor Program Award.Sahuquillo Borrás, J.; Petit Martí, SV.; Selfa Oliver, V.; Gómez Requena, ME. (2015). A Research-Oriented Course on Advanced Multicore Architecture. IEEE Computer Society. https://doi.org/10.1109/IPDPSW.2015.46

Building Machines That Learn and Think Like People

Recent progress in artificial intelligence (AI) has renewed interest in building systems that learn and think like people. Many advances have come from using deep neural networks trained end-to-end in tasks such as object recognition, video games, and board games, achieving performance that equals or even beats humans in some respects. Despite their biological inspiration and performance achievements, these systems differ from human intelligence in crucial ways. We review progress in cognitive science suggesting that truly human-like learning and thinking machines will have to reach beyond current engineering trends in both what they learn, and how they learn it. Specifically, we argue that these machines should (a) build causal models of the world that support explanation and understanding, rather than merely solving pattern recognition problems; (b) ground learning in intuitive theories of physics and psychology, to support and enrich the knowledge that is learned; and (c) harness compositionality and learning-to-learn to rapidly acquire and generalize knowledge to new tasks and situations. We suggest concrete challenges and promising routes towards these goals that can combine the strengths of recent neural network advances with more structured cognitive models.Comment: In press at Behavioral and Brain Sciences. Open call for commentary proposals (until Nov. 22, 2016). https://www.cambridge.org/core/journals/behavioral-and-brain-sciences/information/calls-for-commentary/open-calls-for-commentar

The development of a hybrid simulator for power system control investigations

Imperial Users onl

Getting quality the old-fashioned way : self confirming attributions in the dynamics of process improvement

Cover title.Includes bibliographical references (p. 53-56).Supported by the NSF. SBR-9422228Nelson P. Repenning and John D. Sterman