1,596 research outputs found
A 0.18ÎŒm CMOS low-noise elliptic low-pass continuous-time filter
This paper presents a seventh order low-pass continuous-time elliptic filter for use in a high-performance wireline communication receiver. As an additional attribute, the filter provides programmable boost in the pass-band to counteract high frequency components attenuation. The filter shows a nominal cutoff frequency of fc=34 MHz , less than 1dB ripple in the pass-band, and a maximum stop-band rejection of 65dB. The filter also exhibits low noise feature (peak root spectral noise density below 56nVâHz) and high linearity (more than 64dB of MTPR for a DMT signal of 0.5Vpp amplitude). It has been designed in a 0.18ÎŒm CMOS technology and it is compliant with industrial operation conditions (-40 to 85° C temperature variation and ± 5% power supply deviation). Simulations show a typical power consumption of 450 mW @ 1.8V supply.Ministerio de Ciencia y TecnologĂa TIC2003-0235
Low-Voltage High-Linearity Wideband Current Differencing Transconductance Amplifier and Its Application on Current-Mode Active Filter
A low-voltage high-linearity wideband current differencing transconductance ampliïŹer (CDTA) is presented in this paper. The CDTA consists of a current differencing circuit and a cross-coupling transconductance circuit. The PSPICE simulations of the proposed CDTA show a good performance: -3dB frequency bandwith is about 900 MHz, low power consumption is 2.48 mW, input current linear range is ±100 ”A and low current-input resistance is less than 20 âŠ, high current-output resistance is more than 3 MâŠ. PSpice simulations for a current-mode universal filter and a proposed high-order filter are also conducted, and the results verify the validity of the proposed CDTA
A wideband linear tunable CDTA and its application in field programmable analogue array
This document is the Accepted Manuscript version of the following article: Hu, Z., Wang, C., Sun, J. et al. âA wideband linear tunable CDTA and its application in field programmable analogue arrayâ, Analog Integrated Circuits and Signal Processing, Vol. 88 (3): 465-483, September 2016. Under embargo. Embargo end date: 6 June 2017. The final publication is available at Springer via https://link.springer.com/article/10.1007%2Fs10470-016-0772-7 © Springer Science+Business Media New York 2016In this paper, a NMOS-based wideband low power and linear tunable transconductance current differencing transconductance amplifier (CDTA) is presented. Based on the NMOS CDTA, a novel simple and easily reconfigurable configurable analogue block (CAB) is designed. Moreover, using the novel CAB, a simple and versatile butterfly-shaped FPAA structure is introduced. The FPAA consists of six identical CABs, and it could realize six order current-mode low pass filter, second order current-mode universal filter, current-mode quadrature oscillator, current-mode multi-phase oscillator and current-mode multiplier for analog signal processing. The Cadence IC Design Tools 5.1.41 post-layout simulation and measurement results are included to confirm the theory.Peer reviewedFinal Accepted Versio
Novel active function blocks and their applications in frequency filters and quadrature oscillators
KmitoÄtovĂ© filtry a sinusoidnĂ oscilĂĄtory jsou lineĂĄrnĂ elektronickĂ© obvody, kterĂ© jsou pouĆŸĂvĂĄny v ĆĄirokĂ© oblasti elektroniky a jsou zĂĄkladnĂmi stavebnĂmi bloky v analogovĂ©m zpracovĂĄnĂ signĂĄlu. V poslednĂ dekĂĄdÄ pro tento ĂșÄel bylo prezentovĂĄno velkĂ© mnoĆŸstvĂ stavebnĂch funkÄnĂch blokĆŻ. V letech 2000 a 2006 na Ăstavu telekomunikacĂ, VUT v BrnÄ byly definovĂĄny univerzĂĄlnĂ proudovĂœ konvejor (UCC) a univerzĂĄlnĂ napÄt'ovĂœ konvejor (UVC) a vyrobeny ve spoluprĂĄci s firmou AMI Semiconductor Czech, Ltd. OvĆĄem, stĂĄle existuje poĆŸadavek na vĂœvoj novĂœch aktivnĂch prvkĆŻ, kterĂ© nabĂzejĂ novĂ© vĂœhody. HlavnĂ pĆĂnos prĂĄce proto spoÄĂvĂĄ v definici dalĆĄĂch pĆŻvodnĂch aktivnĂch stavebnĂch blokĆŻ jako jsou differential-input buffered and transconductance amplifier (DBTA), current follower transconductance amplifier (CFTA), z-copy current-controlled current inverting transconductance amplifier (ZC-CCCITA), generalized current follower differential input transconductance amplifier (GCFDITA), voltage gain-controlled modified current-feedback operational amplifier (VGC-MCFOA), a minus-type current-controlled third-generation voltage conveyor (CC-VCIII-). PomocĂ navrĆŸenĂœch aktivnĂch stavebnĂch blokĆŻ byly prezentovĂĄny pĆŻvodnĂ zapojenĂ fĂĄzovacĂch ÄlĂĄnkĆŻ prvnĂho ĆĂĄdu, univerzĂĄlnĂ filtry druhĂ©ho ĆĂĄdu, ekvivalenty obvodu typu KHN, inverznĂ filtry, aktivnĂ simulĂĄtory uzemnÄnĂ©ho induktoru a kvadraturnĂ sinusoidnĂ oscilĂĄtory pracujĂcĂ v proudovĂ©m, napÄt'ovĂ©m a smĂĆĄenĂ©m mĂłdu. ChovĂĄnĂ navrĆŸenĂœch obvodĆŻ byla ovÄĆena simulacĂ v prostĆedĂ SPICE a ve vybranĂœch pĆĂpadech experimentĂĄlnĂm mÄĆenĂm.Frequency filters and sinusoidal oscillators are linear electric circuits that are used in wide area of electronics and also are the basic building blocks in analogue signal processing. In the last decade, huge number of active building blocks (ABBs) were presented for this purpose. In 2000 and 2006, the universal current conveyor (UCC) and the universal voltage conveyor (UVC), respectively, were designed at the Department of Telecommunication, BUT, Brno, and produced in cooperation with AMI Semiconductor Czech, Ltd. There is still the need to develop new active elements that offer new advantages. The main contribution of this thesis is, therefore, the definition of other novel ABBs such as the differential-input buffered and transconductance amplifier (DBTA), the current follower transconductance amplifier (CFTA), the z-copy current-controlled current inverting transconductance amplifier (ZC-CCCITA), the generalized current follower differential input transconductance amplifier (GCFDITA), the voltage gain-controlled modified current-feedback operational amplifier (VGC-MCFOA), and the minus-type current-controlled third-generation voltage conveyor (CC-VCIII-). Using the proposed ABBs, novel structures of first-order all-pass filters, second-order universal filters, KHN-equivalent circuits, inverse filters, active grounded inductance simulators, and quadrature sinusoidal oscillators working in the current-, voltage-, or mixed-mode are presented. The behavior of the proposed circuits has been verified by SPICE simulations and in selected cases also by experimental measurements.
Single-input Multiple-output Tunable Log-domain Current-mode Universal Filter
This paper describes the design of a current-mode single-input multiple-output (SIMO) universal filter based on the log-domain filtering concept. The circuit is a direct realization of a first-order differential equation for obtaining the lossy integrator circuit. Lossless integrators are realized by log-domain lossy integrators. The proposed filter comprises only two grounded capacitors and twenty-four transistors. This filter suits to operate in very high frequency (VHF) applications. The pole-frequency of the proposed filter can be controlled over five decade frequency range through bias currents. The pole-Q can be independently controlled with the pole-frequency. Non-ideal effects on the filter are studied in detail. A validated BJT model is used in the simulations operated by a single power supply, as low as 2.5 V. The simulation results using PSpice are included to confirm the good performances and are in agreement with the theory
Modelling, Simulation, and Control of a Flexible Space Launch Vehicle
Modern Space Launch Vehicles (SLVs), being slender in shape and due to the
use of lightweight materials, are generally flexible in nature. This structural
flexibility, when coupled with sensor and actuator dynamics, can adversely
affect the control of SLV, which may lead to vehicle instability and, in the
worst-case scenario, to structural failure. This work focuses on modelling and
simulation of rigid and flexible dynamics of an SLV and its interactions with
the control system. SpaceX's Falcon 9 has been selected for this study. The
flexible modes are calculated using modal analysis in Ansys. High-fidelity
nonlinear simulation is developed which incorporates the flexible modes and
their interactions with rigid degrees of freedom. Moreover, linearized models
are developed for flexible body dynamics, over the complete trajectory until
the first stage's separation. Using classical control methods, attitude
controllers, that keep the SLV on its desired trajectory, are developed, and
multiple filters are designed to suppress the interactions of flexible
dynamics. The designed controllers along with filters are implemented in the
nonlinear simulation. Furthermore, to demonstrate the robustness of designed
controllers, Monte-Carlo simulations are carried out and results are presented.Comment: Presented at 20th International Bhurban Conference on Applied
Sciences and Technology (IBCAST), 202
Modern VLSI Analogue Filter Design: Methodology and Software Development
This thesis describes various approaches for the design of modern analogue filters and provides a practical filter and equaliser design aids system XFILT. The thesis begins by placing the analogue filter design technique and software into a historical and technology perspective. The evolution of the analogue filter is traced from early work, through the passive-RLC to transconductor-C and switched-current realisations. The software development in VLSI analogue filter automation is reviewed. For SC filter design, a cascade SC design approach which includes a novel pole-zero pairing method and a comprehensive comparison of SC filter realisation using different biquads are presented. Very useful guidelines for the choice of a suitable biquad structure according to the nature of the filter problem are presented. The canonical realisations of SC filter are studied. The multirate SC system design is described. Several strategies and the algorithms for multirate SC system design are proposed. In transconductor-C filter design research, the definition of a canonical ladder based transconductor-C filter is introduced, and two canonical ladder based transconductor-C filter design approaches are proposed. The ladder based transconductor-C equaliser design is also discussed. A practical video frequency transconductor-C filter and equaliser design is given to demonstrate the utility of the matrix design method and the design software. A new approach to realise exact ladder based SI filter with first and second generation memory cell has been proposed. The bilinear transformation is used in the design procedure. Eight different SI ladder based structures can be obtained for one prototype ladder. Therefore it provides SI filter designers with various circuit choices based on different requirement such as area, maximum ratio of transistor aspect ratio limit, sensitivity or noise performance. Techniques to improve dynamic range and reduce circuit parameter spread are also presented. The proposed approach is well suited for a computer compiler implementation. A suitability study of each decomposition method for different filtering applications is also carried out and a general guideline for the choice of different decomposition methods is obtained. A comparison study on SI filter sensitivity performance based on first generation and second generation memory cells is carried out. Using four filter examples, it is demonstrated that SI filters based on a second generation SI memory cell have good sensitivity performance. For SI filters based on first generation memory cells, it is shown that a high ratio of clock frequency to cutoff frequency in the lowpass case, or a high ratio of clock frequency to midband frequency in the bandpass case would introduce high sensitivity. A novel approach for SI ladder filter based on the S2I integrator is also proposed and a canonical realisation for SI filter based on S2I integrator is developed. Examination of SI equaliser design reveals that cascade structure is a better candidate than ladder based structure. Multirate SI filter system design is also studied. Finally, a very brief introduction to the assembly of the design methods in this thesis into a software package XHLT for VLSI analogue filter and equaliser design is given. The user aspects of XFILT have been discussed and various capabilities of XFILT are demonstrated. Several advanced facilities which remove traditional design limitations are illustrated. The philosophy of the system is explained. It is shown that the distinguished features of XFILT are Ease of Use. General Applicability, and Ease of Extension. The system structure is described and the graphics interface which acts both as user friendly interface and a system manager of all the software is outlined. Fabricated SC, transconductor-C, and SI filter and equaliser have been designed by using XFILT. The system is under further enhancement toward a commercial product
Summed Parallel Infinite Impulse Response (SPIIR) Filters For Low-Latency Gravitational Wave Detection
With the upgrade of current gravitational wave detectors, the first detection
of gravitational wave signals is expected to occur in the next decade.
Low-latency gravitational wave triggers will be necessary to make fast
follow-up electromagnetic observations of events related to their source, e.g.,
prompt optical emission associated with short gamma-ray bursts. In this paper
we present a new time-domain low-latency algorithm for identifying the presence
of gravitational waves produced by compact binary coalescence events in noisy
detector data. Our method calculates the signal to noise ratio from the
summation of a bank of parallel infinite impulse response (IIR) filters. We
show that our summed parallel infinite impulse response (SPIIR) method can
retrieve the signal to noise ratio to greater than 99% of that produced from
the optimal matched filter. We emphasise the benefits of the SPIIR method for
advanced detectors, which will require larger template banks.Comment: 9 pages, 6 figures, for PR
Automatic Synthesis of VLSI Layout for CMOS Continuous-Time Filters
Automatic synthesis of digital VLSI layout has been available for many years. It has become a necessary part of the design industry as the window of time from conception to production shrinks with ever increasing competition. However, automatic synthesis of analog VLSI layout remains rare.
With digital circuits, there is often room for signal drift. In a digital circuit, a signal can drift within a range before hitting the threshold which triggers a change in logic state. The effect of parasitic capacitances for the most part, hinders the timing margins of the signal, but not its functionality. The logic functionality is protected by the inherent noise immunity of digital circuits.
With analog circuits, however, there is little room for signal drift. Parasitic directly influence signal integrity and the functionality of the circuit. The underlying problem, that the automatic VLSI layout programs face, is how to minimize this influence.
This thesis describes a software tool that was written to show that the minimization of parasitic influence is possible in the case of automatic layout of continuous-time filters using transconductance-capacitor methods
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