31 research outputs found

    The Complexity of Helly-B1B_{1} EPG Graph Recognition

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    Golumbic, Lipshteyn, and Stern defined in 2009 the class of EPG graphs, the intersection graph class of edge paths on a grid. An EPG graph GG is a graph that admits a representation where its vertices correspond to paths in a grid QQ, such that two vertices of GG are adjacent if and only if their corresponding paths in QQ have a common edge. If the paths in the representation have at most kk bends, we say that it is a BkB_k-EPG representation. A collection CC of sets satisfies the Helly property when every sub-collection of CC that is pairwise intersecting has at least one common element. In this paper, we show that given a graph GG and an integer kk, the problem of determining whether GG admits a BkB_k-EPG representation whose edge-intersections of paths satisfy the Helly property, so-called Helly-BkB_k-EPG representation, is in NP, for every kk bounded by a polynomial function of V(G)|V(G)|. Moreover, we show that the problem of recognizing Helly-B1B_1-EPG graphs is NP-complete, and it remains NP-complete even when restricted to 2-apex and 3-degenerate graphs

    Edge Intersection Graphs of L-Shaped Paths in Grids

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    In this paper we continue the study of the edge intersection graphs of one (or zero) bend paths on a rectangular grid. That is, the edge intersection graphs where each vertex is represented by one of the following shapes: \llcorner,\ulcorner, \urcorner, \lrcorner, and we consider zero bend paths (i.e., | and -) to be degenerate \llcorners. These graphs, called B1B_1-EPG graphs, were first introduced by Golumbic et al (2009). We consider the natural subclasses of B1B_1-EPG formed by the subsets of the four single bend shapes (i.e., {\llcorner}, {\llcorner,\ulcorner}, {\llcorner,\urcorner}, and {\llcorner,\ulcorner,\urcorner}) and we denote the classes by [\llcorner], [\llcorner,\ulcorner], [\llcorner,\urcorner], and [\llcorner,\ulcorner,\urcorner] respectively. Note: all other subsets are isomorphic to these up to 90 degree rotation. We show that testing for membership in each of these classes is NP-complete and observe the expected strict inclusions and incomparability (i.e., [\llcorner] \subsetneq [\llcorner,\ulcorner], [\llcorner,\urcorner] \subsetneq [\llcorner,\ulcorner,\urcorner] \subsetneq B1B_1-EPG; also, [\llcorner,\ulcorner] is incomparable with [\llcorner,\urcorner]). Additionally, we give characterizations and polytime recognition algorithms for special subclasses of Split \cap [\llcorner].Comment: 14 pages, to appear in DAM special issue for LAGOS'1

    Relationship of kk-Bend and Monotonic \ell-Bend Edge Intersection Graphs of Paths on a Grid

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    If a graph GG can be represented by means of paths on a grid, such that each vertex of GG corresponds to one path on the grid and two vertices of GG are adjacent if and only if the corresponding paths share a grid edge, then this graph is called EPG and the representation is called EPG representation. A kk-bend EPG representation is an EPG representation in which each path has at most kk bends. The class of all graphs that have a kk-bend EPG representation is denoted by BkB_k. BmB_\ell^m is the class of all graphs that have a monotonic (each path is ascending in both columns and rows) \ell-bend EPG representation. It is known that BkmBkB_k^m \subsetneqq B_k holds for k=1k=1. We prove that BkmBkB_k^m \subsetneqq B_k holds also for k{2,3,5}k \in \{2, 3, 5\} and for k7k \geqslant 7 by investigating the BkB_k-membership and BkmB_k^m-membership of complete bipartite graphs. In particular we derive necessary conditions for this membership that have to be fulfilled by mm, nn and kk, where mm and nn are the number of vertices on the two partition classes of the bipartite graph. We conjecture that BkmBkB_{k}^{m} \subsetneqq B_{k} holds also for k{4,6}k\in \{4,6\}. Furthermore we show that Bk⊈B2k9mB_k \not\subseteq B_{2k-9}^m holds for all k5k\geqslant 5. This implies that restricting the shape of the paths can lead to a significant increase of the number of bends needed in an EPG representation. So far no bounds on the amount of that increase were known. We prove that B1B3mB_1 \subseteq B_3^m holds, providing the first result of this kind

    Vertex intersection graphs of paths on a grid: characterization within block graphs

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    Weinvestigate graphs that can be represented as vertex intersections of horizontal and vertical paths in a grid, the so called B0-VPG graphs. Recognizing this class is an NP-complete problem. Although, there exists a polynomial time algorithm for recognizing chordal B0-VPG graphs. In this paper, we present a minimal forbidden induced subgraph characterization of B0-VPG graphs restricted to block graphs. As a byproduct, the proof of the main theorem provides an alternative certifying recognition and representation algorithm for B0-VPG graphs in the class of block graphs.Departamento de MatemáticaUniversidad de Buenos AiresConsejo Nacional de Investigaciones Científicas y Técnica

    Recognizing Proper Tree-Graphs

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    Intelligent approaches to VLSI routing

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    Very Large Scale Integrated-circuit (VLSI) routing involves many large-size and complex problems and most of them have been shown to be NP-hard or NP-complete. As a result, conventional approaches, which have been successfully used to handle relatively small-size routing problems, are not suitable to be used in tackling large-size routing problems because they lead to \u27combinatorial explosion\u27 in search space. Hence, there is a need for exploring more efficient routing approaches to be incorporated into today\u27s VLSI routing system. This thesis strives to use intelligent approaches, including symbolic intelligence and computational intelligence, to solve three VLSI routing problems: Three-Dimensional (3-D) Shortest Path Connection, Switchbox Routing and Constrained Via Minimization. The 3-D shortest path connection is a fundamental problem in VLSI routing. It aims to connect two terminals of a net that are distributed in a 3-D routing space subject to technological constraints and performance requirements. Aiming at increasing computation speed and decreasing storage space requirements, we present a new A* algorithm for the 3-D shortest path connection problem in this thesis. This new A*algorithm uses an economical representation and adopts a novel back- trace technique. It is shown that this algorithm can guarantee to find a path if one exists and the path found is the shortest one. In addition, its computation speed is fast, especially when routed nets are spare. The computational complexities of this A* algorithm at the best case and the worst case are O(Ɩ) and 0(Ɩ3), respectively, where Ɩ is the shortest path length between the two terminals. Most importantly, this A\u27 algorithm is superior to other shortest path connection algorithms as it is economical in terms of storage space requirement, i.e., 1 bit/grid. The switchbox routing problem aims to connect terminals at regular intervals on the four sides of a rectangle routing region. From a computational point of view, the problem is NP-hard. Furthermore, it is extremely complicated and as the consequence no existing algorithm can guarantee to find a solution even if one exists no matter how high the complexity of the algorithm is. Previous approaches to the switch box routing problem can be divided into algorithmic approaches and knowledge-based approaches. The algorithmic approaches are efficient in computational time, but they are unsucessful at achieving high routing completion rate, especially for some dense and complicated switchbox routing problems. On the other hand, the knowledge-based approaches can achieve high routing completion rate, but they are not efficient in computation speed. In this thesis we present a hybrid approach to the switchbox routing problem. This hybrid approach is based on a new knowledge-based routing technique, namely synchronized routing, and combines some efficient algorithmic routing techniques. Experimental results show it can achieve the high routing completion rate of the knowledge-based approaches and the high efficiency of the algorithmic approaches. The constrained via minimization is an important optimization problem in VLSI routing. Its objective is to minimize the number of vias introduced in VLSI routing. From computational perspective, the constrained via minimization is NP-complete. Although for a special case where the number of wire segments splits at a via candidate is not more than three, elegant theoretical results have been obtained. For a general case in which there exist more than three wire segment splits at a via candidate few approaches have been proposed, and those approaches are only suitable for tackling some particular routing styles and are difficult or impossible to adjust to meet practical requirements. In this thesis we propose a new graph-theoretic model, namely switching graph model, for the constrained via minimization problem. The switching graph model can represent both grid-based and grid less routing problems, and allows arbitrary wire segments split at a via candidate. Then on the basis of the model, we present the first genetic algorithm for the constrained via minimization problem. This genetic algorithm can tackle various kinds of routing styles and be configured to meet practical constraints. Experimental results show that the genetic algorithm can find the optimal solutions for most cases in reasonable time
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