803 research outputs found

    Design methods for 60GHz beamformers in CMOS

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    The 60GHz band is promising for applications such as high-speed short-range wireless personal-area network (WPAN), real-time video streaming at rates of several-Gbps, automotive radar, and mm-Wave imaging, since it provides a large amount of bandwidth that can freely (i.e. without a license) be used worldwide. However, transceivers at 60GHz pose several additional challenges over microwave transceivers. In addition to the circuit design challenges of implementing high performance 60GHz RF circuits in mainstream CMOS technology, the path loss at 60GHz is significantly higher than at microwave frequencies because of the smaller size of isotropic antennas. This can be overcome by using phased array technology. This thesis studies the new concepts and design techniques that can be used for 60GHz phased array systems. It starts with an overview of various applications at mm-wave frequencies, such as multi-Gbps radio at 60GHz, automotive radar and millimeter-wave imaging. System considerations of mm-wave receivers and transmitters are discussed, followed by the selection of a CMOS technology to implement millimeter-wave (60GHz) systems. The link budget of a 60GHz WPAN is analyzed, which leads to the introduction of phased array techniques to improve system performance. Different phased array architectures are studied and compared. The system requirements of phase shifters are discussed. Several types of conventional RF phase shifters are reviewed. A 60GHz 4-bit passive phase shifter is designed and implemented in a 65nm CMOS technology. Measurement results are presented and compared to published prior art. A 60GHz 4-bit active phase shifter is designed and integrated with low noise amplifier and combiner for a phased array receiver. This is implemented in a 65nm CMOS technology, and the measurement results are presented. The design of a 60GHz 4-bit active phase shifter and its integration with power amplifier is also presented for a phased array transmitter. This is implemented in a 65nm CMOS technology. The measurement results are also presented and compared to reported prior art. The integration of a 60GHz CMOS amplifier and an antenna in a printed circuit-board (PCB) package is investigated. Experimental results are presented and discussed

    Optimization study of high power static inverters and converters Final report

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    Optimization study and basic performance characteristics for conceptual designs for high power static inverter

    Integrated Circuits for Medical Ultrasound Applications: Imaging and Beyond

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    Medical ultrasound has become a crucial part of modern society and continues to play a vital role in the diagnosis and treatment of illnesses. Over the past decades, the develop- ment of medical ultrasound has seen extraordinary progress as a result of the tremendous research advances in microelectronics, transducer technology and signal processing algorithms. How- ever, medical ultrasound still faces many challenges including power-efficient driving of transducers, low-noise recording of ultrasound echoes, effective beamforming in a non-linear, high- attenuation medium (human tissues) and reduced overall form factor. This paper provides a comprehensive review of the design of integrated circuits for medical ultrasound applications. The most important and ubiquitous modules in a medical ultrasound system are addressed, i) transducer driving circuit, ii) low- noise amplifier, iii) beamforming circuit and iv) analog-digital converter. Within each ultrasound module, some representative research highlights are described followed by a comparison of the state-of-the-art. This paper concludes with a discussion and recommendations for future research directions

    Study and design of topologies and components for high power density DC-DC converters

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    Size reduction of low power electronic DC–DC converters is a topic of major interest for power electronics which requires the study and design of circuits and components working under redefined requirements. For this purpose, novel circuital topologies provide advantages in terms of power density increment, especially where a single chip design is feasible. These concepts have been applied to design and implement an integrated high step-down multiphase buck converter and to study the miniaturization of a stackable fiflyback architecture. Particular attention has been dedicated to power inductors, focusing on the modeling and measurement of magnetic materials’ hysteresis and core losses

    Voltage stacking for near/sub-threshold operation

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    Technology aware circuit design for smart sensors on plastic foils

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    Integrated optic waveguide devices

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    Integrated optic waveguide circuits with a phase bias and modulator on the same chip were designed, fabricated, and tested for use in a fiber-optic rotation sensor (gyro) under development. Single mode fiber-optic pigtails were permanently coupled to the four ports of the chip. The switch format was based on coherent coupling between waveguides formed in Z-cut LiNbO3. The control of the coupling was achieved by electro-optically varying the phase propagation constants of each guide. Fiber-to-chip interfacing required the development of appropriate fixturing and manipulation techniques to achieve the close tolerance needed for high coupling efficiency between a fiber with an approximately 5 micron m core and a channel guide with a roughly 2 micron m by 5 micron m cross section. Switch and chip performance at 0.85 micron m is discussed as well as potential improvements related to insertion loss reduction, switching voltages, and suppression of Li2O out-diffusion
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