A case study for NoC based homogeneous MPSoC architectures

The many-core design paradigm requires flexible and modular hardware and software components to provide the required scalability to next-generation on-chip multiprocessor architectures. A multidisciplinary approach is necessary to consider all the interactions between the different components of the design. In this paper, a complete design methodology that tackles at once the aspects of system level modeling, hardware architecture, and programming model has been successfully used for the implementation of a multiprocessor network-on-chip (NoC)-based system, the NoCRay graphic accelerator. The design, based on 16 processors, after prototyping with field-programmable gate array (FPGA), has been laid out in 90-nm technology. Post-layout results show very low power, area, as well as 500 MHz of clock frequency. Results show that an array of small and simple processors outperform a single high-end general purpose processo

LEGaTO: first steps towards energy-efficient toolset for heterogeneous computing

LEGaTO is a three-year EU H2020 project which started in December 2017. The LEGaTO project will leverage task-based programming models to provide a software ecosystem for Made-in-Europe heterogeneous hardware composed of CPUs, GPUs, FPGAs and dataflow engines. The aim is to attain one order of magnitude energy savings from the edge to the converged cloud/HPC.Peer ReviewedPostprint (author's final draft

Intellectual Property and Innovation: Changing Perspectives in the Indian IT Industry

Indian government has undertaken significant modifications in the IP regime of the country. This will lead to a realignment of business strategies by firms in several sectors. Similarly, with liberalization and globalization, new opportunities for IP creation may emerge for Indian firms. In this context, the paper attempts to document the emerging perspectives vis-�-vis IPRs in the Indian IT industry and explore factors that are driving the change in perspectives. Large IT firms and firms in high-end niche areas are proactively seeking IP based growth strategies. While they typically seek IP protection in Western nations and not so much in India, this has led them to perceive restrictive IP regimes more positively. IP regimes in the West are more relevant for IP creating Indian IT firms today but this may change in the near future as Indian market expands. Significant IP creation by MNC subsidiaries in India is also contributing to this change in perception. Survey data show that an average IT firm in India also perceives IP protection as an important appropriability mechanism, but access to markets and relevant complementary assets continue to be more important for appropriating profits from their economic activity. A positive view of the restrictive IP regimes also gets reflected in the demands of Indian industry associations for changes in the Indian law. Broadly, these changes in perceptions seem to be linked to the evolving global production networks, changing activity profile of Indian IT firms, emerging business opportunities and changes in the competitive scenario. The understanding of Indian IT firms of the complexities of IP regimes remains rudimentary and they will need significant preparation to deal with these IP related challenges.

The future of computing beyond Moore's Law.

Moore's Law is a techno-economic model that has enabled the information technology industry to double the performance and functionality of digital electronics roughly every 2 years within a fixed cost, power and area. Advances in silicon lithography have enabled this exponential miniaturization of electronics, but, as transistors reach atomic scale and fabrication costs continue to rise, the classical technological driver that has underpinned Moore's Law for 50 years is failing and is anticipated to flatten by 2025. This article provides an updated view of what a post-exascale system will look like and the challenges ahead, based on our most recent understanding of technology roadmaps. It also discusses the tapering of historical improvements, and how it affects options available to continue scaling of successors to the first exascale machine. Lastly, this article covers the many different opportunities and strategies available to continue computing performance improvements in the absence of historical technology drivers. This article is part of a discussion meeting issue 'Numerical algorithms for high-performance computational science'