Silicon Nitride Deposition, Chromium Corrosion Mechanisms and Source/Drain Parasitic Resistance in Amorphous Silicon Thin Film transistors

Hydrogenated amorphous silicon (a-Si:H) based thin film transistors (TFTs) are finding increased application as switching elements in active-matrix liquid crystal displays (AMLCDs). Extensive research has been focussed on optimizing fabrication conditions to improve materials quality and on reducing channel length to increase device speed. However, the basic physics and chemistry have not yet been fully understood. In addition, little attention has been paid to the significant effect of source/drain parasitics. The work described in this thesis is closely related to the speed and stability issues on the discrete device level. Specifically, the influence of gate nitride deposition and its NH3 plasma treatment has been studied. The competing effects of nitridation reaction and radiation damage were found to cause an interesting trade-off between the device stability and speed. Further effort was devoted to the analysis of an important TFT failure phenomenon. Both electrical and spectroscopic techniques were utilized for gate Cr corrosion studies. It was determined that the corrosion was largely promoted by the CF4 plasma exposure of Cr during the fabrication. Finally, new test structures were designed, fabricated and characterized to study the source/drain parasitic resistance

DESIGN, SIMULATION AND FABRICATION OF ALGAN/GAN NORMALLY-OFF HIGH ELECTRON MOBILITY TRANSISTORS WITH INVESTIGATION ON TEMPERATURE STABILITY

Ph.DDOCTOR OF PHILOSOPH

Oxygen-insertion Technology for CMOS Performance Enhancement

Until 2003, the semiconductor industry followed Dennard scaling rules to improve complementary metal-oxide-semiconductor (CMOS) transistor performance. However, performance gains with further reductions in transistor gate length are limited by physical effects that do not scale commensurately with device dimensions: short-channel effects (SCE) due to gate-leakage-limited gate-oxide thickness scaling, channel mobility degradation due to enhanced vertical electric fields, increased parasitic resistances due to reductions in source/drain (S/D) contact area, and increased variability in transistor performance due to random dopant fluctuation (RDF) effects and gate work function variations (WFV). These emerging scaling issues, together with increased process complexity and cost, pose severe challenges to maintaining the exponential scaling of transistor dimensions. This dissertation discusses the benefits of oxygen-insertion (OI) technology, a CMOS performance booster, for overcoming these challenges. The benefit of OI technology to mitigate the increase in sheet resistance ($R_{sh}$) with decreasing junction depth ($X_J$) for ultra-shallow-junctions (USJs) relevant for deep-sub-micron planar CMOS transistors is assessed through the fabrication of $R_{sh}$ test structures, electrical characterization, and technology computer-aided design (TCAD) simulations. Experimental and secondary ion mass spectroscopy (SIMS) analyses indicate that OI technology can facilitate low-resistivity USJ formation by reducing $R_{sh}$ and $X_J$ due to retarded transient-enhanced-diffusion (TED) effects and enhanced dopant retention during post-implantation thermal annealing. It is also shown that a low-temperature-oxide (LTO) capping can increase $R_{sh}$ unfavorably due to lower dopant activation levels, which can be alleviated by OI technology. This dissertation extends the evaluation of OI technology to advanced FinFET technology, targeting 7/8-nm low power technology node. A bulk-Si FinFET design comprising a super-steep retrograde (SSR) fin channel doping profile achievable with OI technology is studied by three-dimensional (3-D) TCAD simulations. As compared with the conventional bulk-Si (control) FinFET design with a heavily-doped fin channel doping profile, SSR FinFETs can achieve higher $I_{on}/I_{off}$ ratios and reduce the sensitivity of device performance to variations due to the lightly doped fin channel. As compared with the SOI FinFET design, SSR FinFETs can achieve similarly low $V_{DD,min}$ for 6T-SRAM cell yield estimation. Both SSR and SOI design can provide for as much as 100 mV reduction in $V_{DD,min}$ compared with the control FinFET design. Overall, the SSR FinFET design that can be achieved with OI technology is demonstrated to be a cheaper alternative to the SOI FinFET technology for extending CMOS scaling beyond the 10-nm node. Finally, this dissertation investigates the benefits of OI technology for reducing the Schottky barrier height ($\Phi_{Bp}$) of a Pt/Ti/p-type Si metal-semiconductor (M/S) contact, which can be expected to help reduce the specific contact resistivity for a p-type silicon contact. Electrical measurements of back-to-back Schottky diodes, SIMS, and X-ray photoelectron spectroscopy (XPS) show that the reduction in $\Phi_{Bp}$ is associated with enhanced Ti 2p and Si 2p core energy level shifts. OI technology is shown to favor low-$\Phi_{Bp}$ Pt monosilicide formation during forming gas anneal (FGA) by suppressing the grain boundary diffusion of Pt atoms into the crystalline Si substrate

GaN-based power devices: Physics, reliability, and perspectives

Over the last decade, gallium nitride (GaN) has emerged as an excellent material for the fabrication of power devices. Among the semicon- ductors for which power devices are already available in the market, GaN has the widest energy gap, the largest critical field, and the highest saturation velocity, thus representing an excellent material for the fabrication of high-speed/high-voltage components. The presence of spon- taneous and piezoelectric polarization allows us to create a two-dimensional electron gas, with high mobility and large channel density, in the absence of any doping, thanks to the use of AlGaN/GaN heterostructures. This contributes to minimize resistive losses; at the same time, for GaN transistors, switching losses are very low, thanks to the small parasitic capacitances and switching charges. Device scaling and monolithic integration enable a high-frequency operation, with consequent advantages in terms of miniaturization. For high power/high- voltage operation, vertical device architectures are being proposed and investigated, and three-dimensional structures—fin-shaped, trench- structured, nanowire-based—are demonstrating great potential. Contrary to Si, GaN is a relatively young material: trapping and degradation processes must be understood and described in detail, with the aim of optimizing device stability and reliability. This Tutorial describes the physics, technology, and reliability of GaN-based power devices: in the first part of the article, starting from a discussion of the main proper- ties of the material, the characteristics of lateral and vertical GaN transistors are discussed in detail to provide guidance in this complex and interesting field. The second part of the paper focuses on trapping and reliability aspects: the physical origin of traps in GaN and the main degradation mechanisms are discussed in detail. The wide set of referenced papers and the insight into the most relevant aspects gives the reader a comprehensive overview on the present and next-generation GaN electronics

SYNTHESIS AND STRUCTURE-PROPERTY STUDIES OF ORGANIC MATERIALS CONTAINING FLUORINATED AND NON-FLUORINATED # SYSTEMS (SMALL MOLECULES AND POLYMERS)

Loline alkaloids (LA) are secondary metabolites produced by Epichloandamp;euml; (anamorph, Neotyphodium) grass endophytes. They are toxic and deterrent to a broad range of herbivorous insects but not to livestock. This protective bioactivity has spurred considerable research into the LA biosynthetic pathway. LOL, the gene cluster containing nine genes, is required for LA biosynthesis. The regulation of LOL genes during LA production in culture and in symbio is of interest. In this study, coordinate regulation between LOL gene expression and LA production level was investigated in both MM culture and symbiota. Results showed that expression of LOL genes in N. uncinatum MM culture were tightly correlated with each other (p andamp;lt; 0.0005), and all presented a significant temporal quadratic pattern during LA production. Gene expression started before LA were detectable, and increased while LA accumulated. The highest gene expression level was reached before the highest amounts of LA were detected, and gene expression level declined to a very low level after amounts of LA plateaued. Observations suggested that the hierarchical clusters based on the correlation coefficient could help to predict the roles of LOL genes in the LA pathway. In symbiota, coordinate coregulation of LOL gene expression with LA was found in E. festucae-meadow fescue inflorescences and stromata, whereby lower LOL gene expression corresponded with the lower LA level in stromata. In N. uncinatum (or N. siegelii)-meadow fescue vegetative tissues, dramatically higher LA levels were found in younger leaf tissue than in older leaf tissue, yet no evidence was found to relate this difference to LOL gene expression differences. Instead, substrate availability may regulate the LA level. In particular, asparagine was more than 10-fold higher in young leaf tissue than in old tissue, although proline was significantly lower in young tissue. Therefore, different regulatory mechanisms underlie LOL gene expression and LA production in different circumstances. The GUS activity of Pro-lolC2-GUS and Pro-lolA2-GUS in Neotyphodium species was almost undetectable in culture, though the activity could be detected in symbiota. The mRNA of GUS did not exhibit the same pattern as lolC2 or lolA2 in culture during LA production time course. A Pro-lolC2-cre transgene was expressed in complex medium, in which lolC2 mRNA was not detectable. These results suggest that proper regulation of LOL genes in culture or symbiota is dependent on the LOL cluster

Organic Thin Film Transistor Integration

This thesis examines strategies to exploit existing materials and techniques to advance organic thin film transistor (OTFT) technology in device performance, device manufacture, and device integration. To enhance device performance, optimization of plasma enhanced chemical vapor deposited (PECVD) gate dielectric thin film and investigation of interface engineering methodologies are explored. To advance device manufacture, OTFT fabrication strategies are developed to enable organic circuit integration. Progress in device integration is achieved through demonstration of OTFT integration into functional circuits for applications such as active-matrix displays and radio frequency identification (RFID) tags. OTFT integration schemes featuring a tailored OTFT-compatible photolithography process and a hybrid photolithography-inkjet printing process are developed. They enable the fabrication of fully-patterned and fully-encapsulated OTFTs and circuits. Research on improving device performance of bottom-gate bottom-contact poly(3,3'''-dialkyl-quarter-thiophene) (PQT-12) OTFTs on PECVD silicon nitride (SiNx) gate dielectric leads to the following key conclusions: (a) increasing silicon content in SiNx gate dielectric leads to enhancement in field-effect mobility and on/off current ratio; (b) surface treatment of SiNx gate dielectric with a combination of O2 plasma and octyltrichlorosilane (OTS) self-assembled monolayer (SAM) delivers the best OTFT performance; (c) an optimal O2 plasma treatment duration exists for attaining highest field-effect mobility and is linked to a “turn-around” effect; and (d) surface treatment of the gold (Au) source/drain contacts by 1-octanethiol SAM limits mobility and should be omitted. There is a strong correlation between the electrical characteristics and the interfacial characteristics of OTFTs. In particular, the device mobility is influenced by the interplay of various interfacial mechanisms, including surface energy, surface roughness, and chemical composition. Finally, the collective knowledge from these investigations facilitates the integration of OTFTs into organic circuits, which is expected to contribute to the development of new generation of all-organic displays for communication devices and other pertinent applications. A major outcome of this work is that it provides an economical means for organic transistor and circuit integration, by enabling use of the well-established PECVD infrastructure, yet not compromising the performance of electronics

Fabrication of 2D materials via novel laser treatment processes and their implementation in optoelectronic applications

Pulsed laser treatment of 2D materials is becoming increasingly popular due to the simple and efficient nature of the treatment process. In this thesis, the femtosecond laser treatment methods of 2D materials to fabricate functionalized particles and nanorods are proposed to deepen the understanding of how the femtosecond laser and the process parameters can be tuned to yield different chemical compositions and shapes, which in turn can fit different applications and devices. A femtosecond laser process was developed to treat flakes of 2D materials (molybdenum disulfide (MoS2), tungsten disulfide (WS2), and boron nitride (BN) flakes) in an ethanol-containing solvent. The highly energetic laser pulses exfoliate and cleave the flakes into nanosheets with diameters of ≈3 nm and simultaneously dissociate the solvent molecules. The dissociated carbon and oxygen atoms from the solvent bond with the freshly cleaved 2D nanoparticles to satisfy edge sites, resulting in the formation of hybrid 2D nanoparticles that contain graphene-like carbon domains as well as the host material. Contrary to the current state of the art, where functionalization techniques can take several days to achieve, the hybrid nanoparticles are formed in as little as 20 min without toxic or corrosive chemicals and are multifunctional. Photoluminescence and absorption owing to both the carbon domains and the host 2D material (MoS2, WS2, or BN) are observed. This novel hybrid optical behavior makes these materials promising for emerging optoelectronic applications. An adaptive recipe was consequently developed to fabricate halogenated graphene particles, aiming to address the main challenge facing large-scale commercialization of perovskite solar cells: their instability and degradation from humidity. The current state of the art studies discussing the implementation of 2D materials in perovskite solar cells to enhance their stability are limited and lack discussion about long-term degradation and efficiency retention. Highly hydrophobic iodinated and chlorinated graphene particles were fabricated using femtosecond laser and incorporated into the hole transport layer and as an encapsulating layer. While the power conversion efficiency (PCE) was retained, the long-term stability was significantly enhanced for the cells containing the graphene in both ambient conditions and highly humid conditions, in test spans of 2200 hrs and 50 hrs, respectively. The previously unrealized ability to grow nanorods and nanotubes of 2D materials using femtosecond laser irradiation is demonstrated. In as little as 20 min, nanorods of tungsten disulfide, molybdenum disulfide, graphene, and boron nitride are grown in solutions. The technique fragments nanoparticles of the 2D materials from bulk flakes and leverages molecular-scale alignment by nonresonant intense laser pulses to direct their assembly into nanorods up to several micrometers in length. The laser treatment process is found to induce phase transformations in some of the materials, and also results in the modification of the nanorods with functional groups from the solvent atoms. Notably, the WS2 nanoparticles, which are ablated from semiconducting 2H WS2 crystallographic phase flakes, reassemble into nanorods consisting of the 1T metallic phase. Due to this transition, and the 1D nature of the fabricated nanorods, the WS2 nanorods display substantial improvements in electrical conductivity and optical transparency when employed as transparent conductors

Characterization of materials and fabrication of active matrix thin film transistor arrays for electrical interfacing of biological materials

Electrical interfacing between semiconductor devices and biological materials has been studied for live cell probing which will make it possible to perform direct electrical sensing of cells. To extend the applicability of extracellular and planar microelectrode arrays, recently vertically aligned nanofibers (VACNFs) have been integrated with micro electrode arrays (MEA) for applications such as cell membrane mimics, gene delivery arrays, neuroelectrochemical interfacing arrays, superhydrophobic switches, and intracellular probes. The main drawback of VACNF-MEA devices are the low density of electrodes and passive addressing approach. In order to increase the number of elements of an MEA and enable both stimulation and recording on the same platform, an actively addressed thin film transistor (TFT) array platform was developed. Active matrix-TFTs are highly functional devices which have been used widely as backplanes in display electronics field over the past few decades.VACNFs were integrated onto the TFT array (TFT-VACNF) as they enhance the electrical sensitivity to the cell relative to standard planar arrays; furthermore, the vertical electrodes provide the potential for intracellular sensing within individual cells. This device platform provides great potential as an advanced microelectrode array for direct cell sensing, probing, and recording with a high electrode density and active addressability. In this study, VACNFs were successfully integrated onto TFT devices to demonstrate a new microelectrode array platform. The materials and processes of the TFT structure were designed to be compatible with the requisite high-temperature (~700°C) and direct current Plasma Enhanced Chemical Vapor Deposition (dc-PECVD) VACNF growth process.To extend the applicability of utilizing these vertical electrodes, this dissertation describes: the characterization and optimization of each layer for the TFT; the fabrication process and issues for active matrix TFT array; the critical device integration issues of VACNFs onto active matrix TFT arrays are elaborated; and the initial and final device characteristics are reported